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Edison Smart®

Lead CMOS Analog IC Design Engineer (DAC/ADC)

Edison Smart®, San Jose, California, United States, 95199

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A semiconductor technology company in San Jose is seeking a Senior/Principal Analog Engineer to lead the design and development of advanced CMOS analog and mixed-signal circuits for next-generation products. Candidates should have over 7 years of experience in analog CMOS IC design, with a strong background in DACs and ADCs. Proficiency in tools like Cadence Virtuoso and Spectre is essential. The role offers a competitive salary, bonuses, and RSUs. #J-18808-Ljbffr