Logos Space
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Lead FPGA Design Engineer
role at
Logos Space
Logos Space is a Low Earth Orbit (LEO) satellite system purpose-built to serve the connectivity needs of commercial enterprise users and government users. We will help fill an important gap in the market, providing resilient, high-performance satellite-based connectivity services to enterprise and government customers worldwide. Speed and reliability are the foundation of the system. Logos is designed to extend cloud and data center network connectivity anywhere in the world to fixed, seaborne, and airborne terminals.
Logos is led by a team of highly experienced engineers with proven track records in the networking and satellite industries.
Position Summary The Lead, FPGA Design Engineering is a high‑profile role and this engineering lead is responsible for conceiving, planning, partnering and executing the DSP, waveform and transceiver chain designs, inclusive of fixed‑point design, implementation, integration on FPGA platforms for use in spacecraft payloads, terminal and ground systems. Hence, a big part of the role is to give definition and meaning to this function in the Logos context, sizing it properly, simplifying it when necessary and then building the team and, through the team, and along with partner teams, owning the production readiness of the IP implemented on FPGA platforms. This person is also responsible for working through implications of various platform choices and then making the final decisions that would give the best FPGA outcomes at the fastest program speed. You should be prepared to work and thrive in a fast‑moving environment where you are comfortable taking vague ideas and turning them into executable actions for the entire modem engineering team. We are seeking engineering leads who like to solve very hard problems!
Responsibilities
Responsible for figuring the IP that is best hosted on an FPGA for spacecraft payloads and for terminals.
Responsible for architecture, design, implementation, integration, verification and test of the key FPGA hosted.
Responsible for bringing great ingenuity to DSP and transceiver chain IP designs on FPGA platforms.
Responsible for conceiving, planning and building all the labs needed to scale to the proper subsystem testing of the Logos Space FPGA systems for both spacecraft and terminal hardware.
Responsible for working with firmware and board‑level hardware teams for the best production outcomes.
Basic Qualifications
Bachelor's degree in Engineering or Computer Science or a STEM field (Science, Technology, Engineering or Math) with significant relevant experience in DSP and system designs targeted to FPGA implementations.
A minimum of 15 years designing FPGA DSP and transceiver IP.
Significant professional experience with team building and managing, especially in a startup context.
Significant professional experience with team and function planning – including all the operational aspects of owning a full function.
Significant experience in satcom and/or terrestrial wireless system design, integration and test.
Proven track record of working with software or hardware systems through the entire product life cycle, starting from conceptual designs and trade‑offs through detailed design, development, manufacturing, integration, testing, deployment and operations in a team setting.
Significant experience in organizational, written and oral communication and experience working with other strong functional leads.
Preferred Qualifications
Master’s or Ph.D. degree in Engineering or Computer Science or a STEM field (Science, Technology, Engineering or Math) with significant relevant experience in FPGA‑based DSP and transceiver system design, integration and test.
15+ years experience with wireless systems design, integration and test.
5+ years experience with leading FPGA design teams.
Experience doing the above in fast‑paced startups.
Experience with building teams in a small company context.
Experience in delivering products to production.
Logos Space Services is an equal‑opportunity employer committed to fostering creativity, curiosity and diverse perspectives among employees. We seek to create an environment where everyone can reach their full potential and drive outstanding results. All qualified applicants will receive consideration for employment without regard to race, national origin, age, sex, religion, disability, sexual orientation, marital status, veteran status, gender identity or expression, or any other basis protected by local, state or federal law. This policy applies to all aspects of employment, including hiring, transfer, promotion, compensation, eligibility for benefits and termination. Offers will be contingent on the candidate's ability to access export‑controlled information under U.S. law.
Seniority Level Mid‑Senior level
Employment Type Full‑time
Job Function Engineering and Information Technology
Industries Telecommunications
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Lead FPGA Design Engineer
role at
Logos Space
Logos Space is a Low Earth Orbit (LEO) satellite system purpose-built to serve the connectivity needs of commercial enterprise users and government users. We will help fill an important gap in the market, providing resilient, high-performance satellite-based connectivity services to enterprise and government customers worldwide. Speed and reliability are the foundation of the system. Logos is designed to extend cloud and data center network connectivity anywhere in the world to fixed, seaborne, and airborne terminals.
Logos is led by a team of highly experienced engineers with proven track records in the networking and satellite industries.
Position Summary The Lead, FPGA Design Engineering is a high‑profile role and this engineering lead is responsible for conceiving, planning, partnering and executing the DSP, waveform and transceiver chain designs, inclusive of fixed‑point design, implementation, integration on FPGA platforms for use in spacecraft payloads, terminal and ground systems. Hence, a big part of the role is to give definition and meaning to this function in the Logos context, sizing it properly, simplifying it when necessary and then building the team and, through the team, and along with partner teams, owning the production readiness of the IP implemented on FPGA platforms. This person is also responsible for working through implications of various platform choices and then making the final decisions that would give the best FPGA outcomes at the fastest program speed. You should be prepared to work and thrive in a fast‑moving environment where you are comfortable taking vague ideas and turning them into executable actions for the entire modem engineering team. We are seeking engineering leads who like to solve very hard problems!
Responsibilities
Responsible for figuring the IP that is best hosted on an FPGA for spacecraft payloads and for terminals.
Responsible for architecture, design, implementation, integration, verification and test of the key FPGA hosted.
Responsible for bringing great ingenuity to DSP and transceiver chain IP designs on FPGA platforms.
Responsible for conceiving, planning and building all the labs needed to scale to the proper subsystem testing of the Logos Space FPGA systems for both spacecraft and terminal hardware.
Responsible for working with firmware and board‑level hardware teams for the best production outcomes.
Basic Qualifications
Bachelor's degree in Engineering or Computer Science or a STEM field (Science, Technology, Engineering or Math) with significant relevant experience in DSP and system designs targeted to FPGA implementations.
A minimum of 15 years designing FPGA DSP and transceiver IP.
Significant professional experience with team building and managing, especially in a startup context.
Significant professional experience with team and function planning – including all the operational aspects of owning a full function.
Significant experience in satcom and/or terrestrial wireless system design, integration and test.
Proven track record of working with software or hardware systems through the entire product life cycle, starting from conceptual designs and trade‑offs through detailed design, development, manufacturing, integration, testing, deployment and operations in a team setting.
Significant experience in organizational, written and oral communication and experience working with other strong functional leads.
Preferred Qualifications
Master’s or Ph.D. degree in Engineering or Computer Science or a STEM field (Science, Technology, Engineering or Math) with significant relevant experience in FPGA‑based DSP and transceiver system design, integration and test.
15+ years experience with wireless systems design, integration and test.
5+ years experience with leading FPGA design teams.
Experience doing the above in fast‑paced startups.
Experience with building teams in a small company context.
Experience in delivering products to production.
Logos Space Services is an equal‑opportunity employer committed to fostering creativity, curiosity and diverse perspectives among employees. We seek to create an environment where everyone can reach their full potential and drive outstanding results. All qualified applicants will receive consideration for employment without regard to race, national origin, age, sex, religion, disability, sexual orientation, marital status, veteran status, gender identity or expression, or any other basis protected by local, state or federal law. This policy applies to all aspects of employment, including hiring, transfer, promotion, compensation, eligibility for benefits and termination. Offers will be contingent on the candidate's ability to access export‑controlled information under U.S. law.
Seniority Level Mid‑Senior level
Employment Type Full‑time
Job Function Engineering and Information Technology
Industries Telecommunications
#J-18808-Ljbffr