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Sr. Director of Networking Silicon
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4 days ago Be among the first 25 applicants
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Job Title:
Sr. Director of Networking Silicon Location:
Santa Clara, CA Compensation:
$240K - $280K base DOE plus bonus and equity Requirement:
Successful tape-outs of high-speed Analog Drivers and TIAs for photonic transceivers, SerDes (NRZ & PAM4), High-speed networking silicon, and advanced-node CMOS.
Position Overview The Sr. Director of Networking Silicon will lead the design and development of advanced-node semiconductor chips for next-generation AI networking. This role combines expertise in high-speed analog design, SerDes, and photonic integration to deliver breakthrough interconnect solutions.
Key Responsibilities
Drive architecture, design, and tape-out of ASICs for high-speed networking.
Lead development of Analog Drivers, TIAs, and SerDes for photonic transceivers.
Collaborate with photonic IC teams on electrical-optical co-design.
Manage post-silicon validation, ATE testing, and system bring-up.
Build and scale high-performing engineering teams and processes.
Qualifications
BS/MS/PhD in Electrical or Computer Engineering.
10+ years in semiconductor design; 5+ years in leadership roles.
Proven success in ASIC tape-outs and high-speed analog design.
Expertise in SerDes (NRZ & PAM4), silicon photonics, and advanced-node CMOS.
Strong leadership and program management experience.
Fully paid medical, dental, and vision
Bonus Potential
Employee Stock Options
PTO/Vacation
401K
#J-18808-Ljbffr
Sr. Director of Networking Silicon
role at
CyberCoders
4 days ago Be among the first 25 applicants
Direct message the job poster from CyberCoders
Job Title:
Sr. Director of Networking Silicon Location:
Santa Clara, CA Compensation:
$240K - $280K base DOE plus bonus and equity Requirement:
Successful tape-outs of high-speed Analog Drivers and TIAs for photonic transceivers, SerDes (NRZ & PAM4), High-speed networking silicon, and advanced-node CMOS.
Position Overview The Sr. Director of Networking Silicon will lead the design and development of advanced-node semiconductor chips for next-generation AI networking. This role combines expertise in high-speed analog design, SerDes, and photonic integration to deliver breakthrough interconnect solutions.
Key Responsibilities
Drive architecture, design, and tape-out of ASICs for high-speed networking.
Lead development of Analog Drivers, TIAs, and SerDes for photonic transceivers.
Collaborate with photonic IC teams on electrical-optical co-design.
Manage post-silicon validation, ATE testing, and system bring-up.
Build and scale high-performing engineering teams and processes.
Qualifications
BS/MS/PhD in Electrical or Computer Engineering.
10+ years in semiconductor design; 5+ years in leadership roles.
Proven success in ASIC tape-outs and high-speed analog design.
Expertise in SerDes (NRZ & PAM4), silicon photonics, and advanced-node CMOS.
Strong leadership and program management experience.
Fully paid medical, dental, and vision
Bonus Potential
Employee Stock Options
PTO/Vacation
401K
#J-18808-Ljbffr