MediaTek
CPO architect for packaging, optical alignment and test
MediaTek, San Jose, California, United States, 95199
CPO architect for packaging, optical alignment and test
This range is provided by MediaTek. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.
Base pay range $190,000.00/yr - $270,000.00/yr
Job Description
Collaborate with product architects in the early definition stage to understand and define package architectures and roadmaps.
Partner with the design team and external vendors to develop package solutions, including FAU and supporting mechanical components, to meet product requirements.
Define mechanical test vehicles to establish design rules and DFM/DFY guidelines.
Requirements
Master’s or PhD in Mechanical Engineering, Electrical Engineering, Materials Science, or related field.
Experience in developing and deploying silicon photonics solutions to the market.
Experience in developing photonics coupler assembly, testing, and DFM.
Over 5 years of experience in semiconductor technology development roles.
Over 5 years of experience collaborating with manufacturing partners, including suppliers, OSATs, and foundries.
In-depth knowledge of various packaging architectures, such as 3D die stacking, 2.5D CoWoS, and fan‑out packaging.
Seniority level Not Applicable
Employment type Full-time
Job function Product Management and Marketing
Industries Computer Hardware Manufacturing, Semiconductor Manufacturing, and Wireless Services
Location San Jose, CA
#J-18808-Ljbffr
Base pay range $190,000.00/yr - $270,000.00/yr
Job Description
Collaborate with product architects in the early definition stage to understand and define package architectures and roadmaps.
Partner with the design team and external vendors to develop package solutions, including FAU and supporting mechanical components, to meet product requirements.
Define mechanical test vehicles to establish design rules and DFM/DFY guidelines.
Requirements
Master’s or PhD in Mechanical Engineering, Electrical Engineering, Materials Science, or related field.
Experience in developing and deploying silicon photonics solutions to the market.
Experience in developing photonics coupler assembly, testing, and DFM.
Over 5 years of experience in semiconductor technology development roles.
Over 5 years of experience collaborating with manufacturing partners, including suppliers, OSATs, and foundries.
In-depth knowledge of various packaging architectures, such as 3D die stacking, 2.5D CoWoS, and fan‑out packaging.
Seniority level Not Applicable
Employment type Full-time
Job function Product Management and Marketing
Industries Computer Hardware Manufacturing, Semiconductor Manufacturing, and Wireless Services
Location San Jose, CA
#J-18808-Ljbffr