Senior Principal Memory IP Architect & IC Design Lead

A leading electronic design automation company in San Jose is seeking a Sr Principal Design Engineer to lead high-performance memory IP architecture design. The position requires expertise in IC micro-architecture and a minimum of 8 years of experience in electrical engineering or related fields. A strong communication skill set is essential. The offered annual salary range is competitive, with comprehensive benefits including 401(k), paid vacation, and health plans. #J-18808-Ljbffr