Senior Memory IP Engineer – Post-Silicon & Debug Lead

A leading electronic design firm in San Jose is seeking a Sr Principal Product Engineer for Memory IP. This role involves post-silicon support, debugging, and customer integration of advanced memory technologies. The ideal candidate holds an M.S. with 7+ years or a Ph.D. with 5+ years of relevant experience, coupled with strong problem-solving skills. Join a dynamic team engaged in cutting-edge technology that influences next-generation products. #J-18808-Ljbffr