Senior FPGA Verification Engineer (Contract)

A technology solutions provider is looking for a Technical Lead II - VLSI in Santa Clara, CA. The position requires extensive experience in FPGA design and verification, particularly with System Verilog and UVM methodologies. Candidates must have a Bachelor's or Master's degree in Electrical Engineering and over 10 years of relevant experience. This contract role focuses on verification of FPGA designs, working closely with design teams to ensure functionality and performance. #J-18808-Ljbffr