Array Labs
Embedded Software Engineer (FPGA and Firmware)
Array Labs, Palo Alto, California, United States, 94306
Embedded Software Engineer (FPGA and Firmware)
This role is offered by Array Labs. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.
Base pay range $150,000.00/yr - $400,000.00/yr
At Array Labs, we are building the world’s most advanced radar imaging satellites to produce an accurate, continuously updated 3D map of the Earth — providing governments and commercial organizations with critical insights into the physical world.
We design and build our entire radar system in‑house, from antenna panels and RF front‑ends to digital electronics, calibration systems, FPGA architectures, and data processing. This vertical integration gives us control over the electrical, thermal, and mechanical constraints that set the limits on radar performance and system reliability.
As an
Embedded Software Engineer , you will develop the firmware, FPGA logic, and embedded software that drive Array’s radar payloads and on‑orbit processing systems. Your work could include writing and maintaining C/C++ firmware for Zynq UltraScale+ MPSoC devices, designing FPGA modules for high‑throughput sensing and data movement, or building Linux‑based embedded systems using PetaLinux and Yocto, collaborating closely with digital, RF, signal processing, and systems engineers to deliver reliable, high‑performance embedded solutions. The software and FPGA architectures you build will directly influence radar timing, data integrity, processing throughput, and system reliability on orbit.
Responsibilities
Develop embedded software and firmware that support Array’s radar sensors, communication links, and satellite systems.
Contribute to bring‑up and integration of FPGA‑based platforms, including Zynq UltraScale+ MPSoCs.
Support the design and implementation of FPGA modules for reliable, high‑throughput data movement.
Participate in building and maintaining Linux‑based embedded systems using tools such as PetaLinux or Yocto.
Create automation, diagnostic, and test tools in Python to accelerate development and validation.
Collaborate across digital, RF, signal processing, and systems teams to evaluate performance, debug issues, and refine embedded architectures.
Basic Qualifications
Bachelors in Electrical or Computer Engineering, or a related field.
3-6 years of experience in FPGA and/or embedded design and development.
Experience with Xilinx FPGA design tools and workflows.
Experience with embedded C/C++ for firmware development.
Excellent teamwork and communication skills.
High levels of self‑motivation and personal accountability.
Ability to work in a fast‑paced environment under significant time constraints.
Preferred Skills and Experience
Master’s degree in Computer Science, Electrical Engineering, or a related field.
Experience building software for complex embedded systems or custom SoCs.
Familiarity with Linux‑based embedded systems development (PetaLinux/Yocto).
Familiarity with Linux kernel drivers and related HW/SW interfaces.
Hands‑on experience in FPGA build and deploy processes.
Proficiency in Python scripting for automation and testing.
Experience with satellite systems or aerospace applications.
Ability to read, interpret and modify schematic diagrams.
ITAR Requirements
To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.
Equal Opportunity Employer
Array Labs is an Equal Opportunity Employer. Employment decisions are made on the basis of merit, competence, and job qualifications and will not be influenced in any manner by gender, color, race, ethnicity, national origin, sexual orientation, religion, age, gender identity, veteran status, disability status, marital status, mental or physical disability or any other legally protected status.
Interview Process We will conduct interviews via Zoom; the typical process takes around 2‑4 weeks to complete from start to finish.
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Base pay range $150,000.00/yr - $400,000.00/yr
At Array Labs, we are building the world’s most advanced radar imaging satellites to produce an accurate, continuously updated 3D map of the Earth — providing governments and commercial organizations with critical insights into the physical world.
We design and build our entire radar system in‑house, from antenna panels and RF front‑ends to digital electronics, calibration systems, FPGA architectures, and data processing. This vertical integration gives us control over the electrical, thermal, and mechanical constraints that set the limits on radar performance and system reliability.
As an
Embedded Software Engineer , you will develop the firmware, FPGA logic, and embedded software that drive Array’s radar payloads and on‑orbit processing systems. Your work could include writing and maintaining C/C++ firmware for Zynq UltraScale+ MPSoC devices, designing FPGA modules for high‑throughput sensing and data movement, or building Linux‑based embedded systems using PetaLinux and Yocto, collaborating closely with digital, RF, signal processing, and systems engineers to deliver reliable, high‑performance embedded solutions. The software and FPGA architectures you build will directly influence radar timing, data integrity, processing throughput, and system reliability on orbit.
Responsibilities
Develop embedded software and firmware that support Array’s radar sensors, communication links, and satellite systems.
Contribute to bring‑up and integration of FPGA‑based platforms, including Zynq UltraScale+ MPSoCs.
Support the design and implementation of FPGA modules for reliable, high‑throughput data movement.
Participate in building and maintaining Linux‑based embedded systems using tools such as PetaLinux or Yocto.
Create automation, diagnostic, and test tools in Python to accelerate development and validation.
Collaborate across digital, RF, signal processing, and systems teams to evaluate performance, debug issues, and refine embedded architectures.
Basic Qualifications
Bachelors in Electrical or Computer Engineering, or a related field.
3-6 years of experience in FPGA and/or embedded design and development.
Experience with Xilinx FPGA design tools and workflows.
Experience with embedded C/C++ for firmware development.
Excellent teamwork and communication skills.
High levels of self‑motivation and personal accountability.
Ability to work in a fast‑paced environment under significant time constraints.
Preferred Skills and Experience
Master’s degree in Computer Science, Electrical Engineering, or a related field.
Experience building software for complex embedded systems or custom SoCs.
Familiarity with Linux‑based embedded systems development (PetaLinux/Yocto).
Familiarity with Linux kernel drivers and related HW/SW interfaces.
Hands‑on experience in FPGA build and deploy processes.
Proficiency in Python scripting for automation and testing.
Experience with satellite systems or aerospace applications.
Ability to read, interpret and modify schematic diagrams.
ITAR Requirements
To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State.
Equal Opportunity Employer
Array Labs is an Equal Opportunity Employer. Employment decisions are made on the basis of merit, competence, and job qualifications and will not be influenced in any manner by gender, color, race, ethnicity, national origin, sexual orientation, religion, age, gender identity, veteran status, disability status, marital status, mental or physical disability or any other legally protected status.
Interview Process We will conduct interviews via Zoom; the typical process takes around 2‑4 weeks to complete from start to finish.
#J-18808-Ljbffr