Altera
Altera is one of the world’s leading providers of programmable solutions. With a renewed focus on agility, software‑first, and AI‑driven solutions, Altera is shaping the future of computing by providing flexible technology, empowering innovators with scalable products, from high‑performance to power‑ and cost‑optimized devices for cloud, network, and edge applications. Join us in our journey to becoming the #1 FPGA provider in the world as we redefine the next era of programmable innovations!
Database, Infrastructure & Tooling (DBIT) Team The Database, Infrastructure & Tooling (DBIT) Team plays a critical role in bringing Altera’s next‑generation FPGA devices to Quartus Prime, our flagship design software. As the bridge between hardware and software, DBIT defines and implements how FPGA devices are modeled within Quartus. If you’re excited about solving complex engineering problems and working at the intersection of hardware and software, DBIT is the place for you.
What You Will Do
Using C++ and Python to specify, implement and maintain software data models to represent FPGA devices.
Developing high‑performance APIs to streamline the access to FPGA device databases for industry‑leading algorithms for synthesis, place‑and‑route, and timing analysis, among others.
Collaborating with multiple hardware and software teams while bringing the next‑generation FPGA devices to Quartus.
Developing tools to aid/enhance Altera’s FPGA device bring‑up process.
Salary Range The pay range below is for Bay Area, California only. Actual salary may vary based on a number of factors including job location, job‑related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.
$113.7K – $164.7K USD
We use artificial intelligence to screen, assess, or select applicants for the position.
Qualifications
Real passion for Software Engineering.
Bachelor’s Degree in Computer Science, Computer Engineering or related fields.
1+ years of programming in C/C++ and Python.
Good written and verbal communication skills.
Ways to Stand Out from the Crowd
Background on algorithms and data structures.
Good problem‑solving skills.
Background on graph‑based algorithms.
Background on HDL design using Verilog, SystemVerilog, and/or VHDL.
Ways to Earn Extra Points
Experience developing EDA tools.
Experience with FPGA architecture and tools.
Experience developing FPGA tools.
Experience developing and maintaining internal applications and APIs.
Job Type: Regular
Shift: Shift 1 (United States of America)
Primary Location: San Jose, California, United States
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
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Database, Infrastructure & Tooling (DBIT) Team The Database, Infrastructure & Tooling (DBIT) Team plays a critical role in bringing Altera’s next‑generation FPGA devices to Quartus Prime, our flagship design software. As the bridge between hardware and software, DBIT defines and implements how FPGA devices are modeled within Quartus. If you’re excited about solving complex engineering problems and working at the intersection of hardware and software, DBIT is the place for you.
What You Will Do
Using C++ and Python to specify, implement and maintain software data models to represent FPGA devices.
Developing high‑performance APIs to streamline the access to FPGA device databases for industry‑leading algorithms for synthesis, place‑and‑route, and timing analysis, among others.
Collaborating with multiple hardware and software teams while bringing the next‑generation FPGA devices to Quartus.
Developing tools to aid/enhance Altera’s FPGA device bring‑up process.
Salary Range The pay range below is for Bay Area, California only. Actual salary may vary based on a number of factors including job location, job‑related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.
$113.7K – $164.7K USD
We use artificial intelligence to screen, assess, or select applicants for the position.
Qualifications
Real passion for Software Engineering.
Bachelor’s Degree in Computer Science, Computer Engineering or related fields.
1+ years of programming in C/C++ and Python.
Good written and verbal communication skills.
Ways to Stand Out from the Crowd
Background on algorithms and data structures.
Good problem‑solving skills.
Background on graph‑based algorithms.
Background on HDL design using Verilog, SystemVerilog, and/or VHDL.
Ways to Earn Extra Points
Experience developing EDA tools.
Experience with FPGA architecture and tools.
Experience developing FPGA tools.
Experience developing and maintaining internal applications and APIs.
Job Type: Regular
Shift: Shift 1 (United States of America)
Primary Location: San Jose, California, United States
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
#J-18808-Ljbffr