Senior RTL Engineer, MidCore CPU (RISC-V)

A leading AI technology company is seeking a Sr. Staff Engineer in Austin, TX. The role involves defining and implementing the MidCore block for a high-performance RISC-V CPU, working closely with engineering teams to achieve functional and power goals. Candidates should have experience in Out-of-Order microarchitecture and RTL coding. Competitive compensation of $100k to $500k, depending on experience and location. #J-18808-Ljbffr