Senior FPGA Design Engineer — Verilog/RTL, Lab Validation

A leading quantum computing company in Palo Alto is looking for a digital design engineer to join their Electronic Sub-Systems team. In this role, you will define and validate innovative digital microarchitecture for FPGAs, work on logic design and debugging, and collaborate with cross-functional teams. The ideal candidate will have over 10 years of experience in FPGA design and development, and possess strong skills in Verilog/SystemVerilog, making significant contributions to the future of quantum computing. Competitive salary and equity benefits are offered. #J-18808-Ljbffr