Senior Design Verification Engineer — UVM & SoC Testing

A leading IT consulting firm is seeking a Design Verification Engineer in Sunnyvale, CA. The role demands strong expertise in SV and UVM, along with debugging skills and a solid understanding of AMBA protocols. Responsibilities include developing test plans, building verification environments, and performing both regression and power-aware simulations. With a mid-senior level designation, the position is full-time and offers opportunities to work closely with RTL designers and ensure design quality across various domains. #J-18808-Ljbffr