Senior DFT Architect for FPGA/SoC - Lead Test Innovation

A global technology organization based in San Jose, CA, is seeking a Senior Technical Staff Engineer - Architect (DFT Lead) to manage DFT requirements and collaborate with cross-functional teams on FPGA and ASIC design. Candidates should have 15+ years of DFT engineering experience and expertise in IJTAG and JTAG. This position offers a competitive salary range of $90,000 - $232,000 and a comprehensive benefits package from the first day of employment. #J-18808-Ljbffr