ASIC DFT Engineer - Hardware Test & Validation

A leading tech company in San Jose, CA is looking for an ASIC Implementation Engineer to focus on Design-for-Test. The role involves implementing innovative DFT features and collaborating across teams for integration and validation. The ideal candidate should have 4+ years of experience in DFT and a relevant degree, with strong skills in Jtag protocols and EDA tools. This opportunity offers a chance to contribute to groundbreaking networking chips and drive DFT strategies through various design phases. #J-18808-Ljbffr