Qualcomm
Qualcomm Technologies, Inc.
Engineering Group > ASICS Engineering
Position Overview As a Design Engineer, you’ll play a critical role in shaping cutting‑edge digital designs. Your responsibilities will include:
Micro‑Architecture: Designing micro‑architecture for both simple and complex digital and interface blocks.
RTL Development: Developing RTL (Register Transfer Level) code using industry best practices – handling multi‑clock designs, high‑frequency requirements, low power, and low latency considerations while ensuring high performance.
Debugging and Post‑Silicon Bring‑Up: Troubleshooting and debugging issues during the development process and supporting post‑silicon bring‑up activities.
Documentation: Creating comprehensive design documentation to ensure clarity and maintainability.
Design Optimization: Optimizing designs for key metrics such as area, power, and performance.
Cross‑Functional Collaboration: Collaborating with cross‑functional teams, including DFT (Design for Testability), Implementation, Verification, Emulation, and Firmware teams.
Location: Must be in San Diego full time, 5 days a week.
Security & Clearance Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information. Must be a U.S. citizen and eligible to receive a U.S. Government security clearance.
Ideal Candidate Will Have
5+ years of work experience with RTL/FPGA design (Verilog, System verilog), embedded system architecture, and verification.
Education: Bachelor’s degree in computer science, electrical/electronics engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR Master’s degree with 5+ years of Hardware Engineering or related work experience. OR PhD in a related field.
Preferred Qualifications
Positive Attitude: Bring a fun‑loving attitude and a passion for inclusively solving problems.
5+ years of ASIC design experience.
RTL Expertise: System Verilog Design, linting, CDC, synthesis (FPGA and ASIC).
Testing: Building the test suites for design validation.
Emulation: Understanding of emulation and prototyping flows for design and validation in lab.
Complex Digital Logic Design: Experience with designing complex digital logic blocks and subsystems (CPU, GPU, DSP, always‑on systems, digital interfaces such as PCIe, UART, I2C, DDRx, SPI, USB).
ISA Familiarity: Knowledge of ISAs such as ARM Thumb or RISC‑V.
Processor/Microcontroller System Design: Understanding of processor or microcontroller system design.
Multi‑Power Domain and Multi‑Clock Domain Designs: Experience with designs spanning multiple power domains and clock domains.
Scripting/Automation Languages: Proficiency in languages like Python or Perl.
Industry Standard Digital Tools: Familiarity with state‑of‑the‑art industry‑standard digital design tools.
Challenges of Lower Node Technologies: Awareness of challenges when working with lower node technologies.
Minimum Qualifications
Bachelor’s degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR Master’s degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR PhD in Science, Engineering, or related field.
Pay Range & Benefits $104,100.00 – $173,400.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Salary is only one component of total compensation; we also offer a competitive annual discretionary bonus, RSU grants, and a comprehensive benefits package. For more details about our U.S. benefits, please visit the link provided.
Equal Opportunity Employer Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected classification.
Qualcomm is committed to providing accessible processes for individuals with disabilities. If you require accommodations, email disability-accomodations@qualcomm.com or call our toll‑free number.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of company confidential information and other proprietary information, to the extent those requirements are permissible under applicable law.
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Position Overview As a Design Engineer, you’ll play a critical role in shaping cutting‑edge digital designs. Your responsibilities will include:
Micro‑Architecture: Designing micro‑architecture for both simple and complex digital and interface blocks.
RTL Development: Developing RTL (Register Transfer Level) code using industry best practices – handling multi‑clock designs, high‑frequency requirements, low power, and low latency considerations while ensuring high performance.
Debugging and Post‑Silicon Bring‑Up: Troubleshooting and debugging issues during the development process and supporting post‑silicon bring‑up activities.
Documentation: Creating comprehensive design documentation to ensure clarity and maintainability.
Design Optimization: Optimizing designs for key metrics such as area, power, and performance.
Cross‑Functional Collaboration: Collaborating with cross‑functional teams, including DFT (Design for Testability), Implementation, Verification, Emulation, and Firmware teams.
Location: Must be in San Diego full time, 5 days a week.
Security & Clearance Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information. Must be a U.S. citizen and eligible to receive a U.S. Government security clearance.
Ideal Candidate Will Have
5+ years of work experience with RTL/FPGA design (Verilog, System verilog), embedded system architecture, and verification.
Education: Bachelor’s degree in computer science, electrical/electronics engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR Master’s degree with 5+ years of Hardware Engineering or related work experience. OR PhD in a related field.
Preferred Qualifications
Positive Attitude: Bring a fun‑loving attitude and a passion for inclusively solving problems.
5+ years of ASIC design experience.
RTL Expertise: System Verilog Design, linting, CDC, synthesis (FPGA and ASIC).
Testing: Building the test suites for design validation.
Emulation: Understanding of emulation and prototyping flows for design and validation in lab.
Complex Digital Logic Design: Experience with designing complex digital logic blocks and subsystems (CPU, GPU, DSP, always‑on systems, digital interfaces such as PCIe, UART, I2C, DDRx, SPI, USB).
ISA Familiarity: Knowledge of ISAs such as ARM Thumb or RISC‑V.
Processor/Microcontroller System Design: Understanding of processor or microcontroller system design.
Multi‑Power Domain and Multi‑Clock Domain Designs: Experience with designs spanning multiple power domains and clock domains.
Scripting/Automation Languages: Proficiency in languages like Python or Perl.
Industry Standard Digital Tools: Familiarity with state‑of‑the‑art industry‑standard digital design tools.
Challenges of Lower Node Technologies: Awareness of challenges when working with lower node technologies.
Minimum Qualifications
Bachelor’s degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR Master’s degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR PhD in Science, Engineering, or related field.
Pay Range & Benefits $104,100.00 – $173,400.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Salary is only one component of total compensation; we also offer a competitive annual discretionary bonus, RSU grants, and a comprehensive benefits package. For more details about our U.S. benefits, please visit the link provided.
Equal Opportunity Employer Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected classification.
Qualcomm is committed to providing accessible processes for individuals with disabilities. If you require accommodations, email disability-accomodations@qualcomm.com or call our toll‑free number.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of company confidential information and other proprietary information, to the extent those requirements are permissible under applicable law.
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