Qualcomm
Staff/ Sr. Staff Design Verification Engineer - QGOV
Qualcomm, Boulder, Colorado, United States, 80301
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Company
Qualcomm Technologies, Inc. Job Area
Engineering Group > ASICS Engineering Role
Design Verification Responsibilities
Familiarity with RTL design in Verilog and System Verilog Develop verification methodology, ensuring scalable and portable environment across simulation and emulation. Develop test plan to verify hardware building blocks, design macros and standard interfaces (PCIe, DDR, USB, I2C, SPI, etc). Own end-to-end DV tasks from coding test bench and test cases, write assertions, run simulations and achieve all coverage goals. Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches. Develop and maintain emulation environment to collect metrics related to emulation environment. Need to be in San Diego full time, 5 days a week. Required Qualifications
5+ years of work experience with RTL/FPGA design (Verilog), embedded system architecture. 5+ years of Design Verification, Emulation and Debug experience with simulation and emulation and prototyping flows. U.S. citizenship and eligibility for a U.S. Government security clearance. Preferred Qualifications
Knowledge of communication protocols such as AXI4‑x, DDRx, PCIe, etc. Strong System Verilog/UVM based verification skills – assertion & coverage-based verification methodology. Experience with formal/static verification methodologies. Experience with emulation platforms – Palladium, Zebu, Veloce, FPGAs. Linux OS proficiency. Minimum Qualifications
Bachelor’s degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. OR Master’s degree with 5+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD with 4+ years of ASIC design, verification, validation, integration, or related work experience. Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information. Qualcomm is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of confidential information and other proprietary information.
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Qualcomm Technologies, Inc. Job Area
Engineering Group > ASICS Engineering Role
Design Verification Responsibilities
Familiarity with RTL design in Verilog and System Verilog Develop verification methodology, ensuring scalable and portable environment across simulation and emulation. Develop test plan to verify hardware building blocks, design macros and standard interfaces (PCIe, DDR, USB, I2C, SPI, etc). Own end-to-end DV tasks from coding test bench and test cases, write assertions, run simulations and achieve all coverage goals. Explore innovative DV methodologies (formal, simulation and emulation based) to continuously push the quality and efficiency of test benches. Develop and maintain emulation environment to collect metrics related to emulation environment. Need to be in San Diego full time, 5 days a week. Required Qualifications
5+ years of work experience with RTL/FPGA design (Verilog), embedded system architecture. 5+ years of Design Verification, Emulation and Debug experience with simulation and emulation and prototyping flows. U.S. citizenship and eligibility for a U.S. Government security clearance. Preferred Qualifications
Knowledge of communication protocols such as AXI4‑x, DDRx, PCIe, etc. Strong System Verilog/UVM based verification skills – assertion & coverage-based verification methodology. Experience with formal/static verification methodologies. Experience with emulation platforms – Palladium, Zebu, Veloce, FPGAs. Linux OS proficiency. Minimum Qualifications
Bachelor’s degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience. OR Master’s degree with 5+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD with 4+ years of ASIC design, verification, validation, integration, or related work experience. Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information. Qualcomm is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification. Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of confidential information and other proprietary information.
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