Neurophos
Principal Analog Design Engineer
Location: Austin, TX or San Francisco, CA. Full‑time onsite position.
Reports To: Senior Director of Analog.
Position Overview Neurophos, listed as one of EE Times’ 2025 100 Most Promising Start‑ups, is revolutionizing AI computation with the world’s first metamaterial‑based optical computing platform. This role focuses on developing cutting‑edge full‑custom electronic transceiver components that interface directly with our custom silicon photonics and are essential to our revolutionary photonic AI platform. The principal engineer will manage the full lifecycle of analog blocks from specification and architecture down to tape‑out‑ready layout, ensuring performance at up to GHz speeds.
Key Responsibilities
Design, simulate, and verify high‑speed analog circuits, such as drivers and transimpedance amplifiers, in deep sub‑micron CMOS technologies.
Define architecture and specifications for electronic blocks based on system‑level requirements.
Perform full‑custom schematic capture, advanced analog simulations, and complete physical layout, including DRC/LVS, of critical analog blocks using Cadence Virtuoso.
Ensure rigorous signal integrity and power integrity across all high‑speed interconnects.
Conduct post‑layout extraction and simulation to validate performance against parasitic effects.
Collaborate closely with the Photonics and Digital teams to optimize the electro‑optic interface, maximizing performance across disciplines.
Qualifications
Degree: MS or PhD in Electrical Engineering.
Experience: 10+ years in full‑custom analog integrated circuit design, with 5+ years dedicated to GHz‑speed RF or broadband analog design.
Expertise in the Cadence Virtuoso schematic, simulation, and custom layout tool suite.
Deep understanding of semiconductor device physics, linearity, noise analysis, and high‑frequency circuit theory.
Proven track record of taking high‑speed analog blocks from concept to mass production (successful tape‑outs).
Preferred Skills
Background in photonic transceivers or optical communication electronics (e.g., drivers for modulators, TIAs for photodetectors).
Experience designing high‑speed power amplifiers (PAs).
Proficiency with electromagnetic simulation tools such as EMX or HFSS.
Experience with frequency domain simulation in Spectre RF.
What We Offer
A pivotal role in an innovative startup redefining AI hardware.
A collaborative and intellectually stimulating work environment.
Competitive compensation, including salary and equity options.
Opportunities for career growth and future team leadership.
Access to cutting‑edge technology and state‑of‑the‑art facilities.
This is a rare opportunity to work on a game‑changing technology at the intersection of photonics and AI. As part of our elite team, you’ll contribute to a platform that redefines computational performance and accelerates the future of artificial intelligence.
Referrals increase your chances of interviewing at Neurophos by 2×.
Seniority level: Mid‑Senior level | Employment type: Full‑time | Job function: Engineering and Information Technology.
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Reports To: Senior Director of Analog.
Position Overview Neurophos, listed as one of EE Times’ 2025 100 Most Promising Start‑ups, is revolutionizing AI computation with the world’s first metamaterial‑based optical computing platform. This role focuses on developing cutting‑edge full‑custom electronic transceiver components that interface directly with our custom silicon photonics and are essential to our revolutionary photonic AI platform. The principal engineer will manage the full lifecycle of analog blocks from specification and architecture down to tape‑out‑ready layout, ensuring performance at up to GHz speeds.
Key Responsibilities
Design, simulate, and verify high‑speed analog circuits, such as drivers and transimpedance amplifiers, in deep sub‑micron CMOS technologies.
Define architecture and specifications for electronic blocks based on system‑level requirements.
Perform full‑custom schematic capture, advanced analog simulations, and complete physical layout, including DRC/LVS, of critical analog blocks using Cadence Virtuoso.
Ensure rigorous signal integrity and power integrity across all high‑speed interconnects.
Conduct post‑layout extraction and simulation to validate performance against parasitic effects.
Collaborate closely with the Photonics and Digital teams to optimize the electro‑optic interface, maximizing performance across disciplines.
Qualifications
Degree: MS or PhD in Electrical Engineering.
Experience: 10+ years in full‑custom analog integrated circuit design, with 5+ years dedicated to GHz‑speed RF or broadband analog design.
Expertise in the Cadence Virtuoso schematic, simulation, and custom layout tool suite.
Deep understanding of semiconductor device physics, linearity, noise analysis, and high‑frequency circuit theory.
Proven track record of taking high‑speed analog blocks from concept to mass production (successful tape‑outs).
Preferred Skills
Background in photonic transceivers or optical communication electronics (e.g., drivers for modulators, TIAs for photodetectors).
Experience designing high‑speed power amplifiers (PAs).
Proficiency with electromagnetic simulation tools such as EMX or HFSS.
Experience with frequency domain simulation in Spectre RF.
What We Offer
A pivotal role in an innovative startup redefining AI hardware.
A collaborative and intellectually stimulating work environment.
Competitive compensation, including salary and equity options.
Opportunities for career growth and future team leadership.
Access to cutting‑edge technology and state‑of‑the‑art facilities.
This is a rare opportunity to work on a game‑changing technology at the intersection of photonics and AI. As part of our elite team, you’ll contribute to a platform that redefines computational performance and accelerates the future of artificial intelligence.
Referrals increase your chances of interviewing at Neurophos by 2×.
Seniority level: Mid‑Senior level | Employment type: Full‑time | Job function: Engineering and Information Technology.
#J-18808-Ljbffr