Broadcom
DFT Quality Engineer
Broadcom's ASIC Product Division is seeking candidates for a DFT Quality Engineer position at our San Jose design center in CA. In this role, you will play a crucial part in ensuring the Quality, Yield & Test Costs in our products through Research & Development of comprehensive Design for Test (DFT) structures, patterns & test strategies. You will work collaboratively with cross‑functional teams & customers to develop, implement, and validate DFT methodologies, guaranteeing that our products meet the highest quality standards.
Key Responsibilities
Collaborate with Key HPC/AI customers to drive test, quality and reliability improvements, including in‑field failures (e.g., Silent Data Corruption).
Use the RMA process and ATE characterization to develop and drive improvements, including fault diagnosis and root‑cause analysis.
Drive production test improvements for quality & cost/test time, including data collection & analysis.
Implement best methods into production, such as fault models, test conditions, optimized test content across test steps, wafer/test, final test and SLT.
Collaborate with customers on board, system, and in‑field results to improve chip/ATE/SLT testing.
Perform data analytics for test/yield optimization (outlier analysis, etc.).
Stay informed about test industry trends (e.g., SLT) and emerging DFT/fault model methods; represent Broadcom as an industry leader by collaborating with HPC/AI customers, EDA companies, and industry peers.
Cross‑functional collaboration with Test Engineering, Global Operations, Design Integration, and IP developers.
Identify and define critical testability requirements with design and architecture teams.
Document new learnings, processes, results, and best practices.
Assist with silicon failure analysis, diagnostics & yield improvement efforts.
Interface with customers, physical design, test engineering, and manufacturing teams across multiple geographies; work closely with IP DFT engineers & other stakeholders.
Skills / Experience
Strong background in DFT (e.g., Analog DFT, MBIST, IEEE1687).
Proven experience in DFT implementation & verification.
Understanding of DFT methodologies, including scan, BIST, and ATPG.
Proficiency in simulation tools and scripting languages (Perl, Python, TCL, Ruby).
Strong communication and teamwork abilities.
Experience working on ATE is a plus.
Solid knowledge in analog and digital circuit design, and device physics fundamentals.
Excellent problem‑solving, debugging, root‑cause analysis and communication skills.
Education & Experience
Bachelor's in Electrical/Electronic/Computer Engineering with 15+ years of relevant industry experience OR Master’s in Electrical/Electronic/Computer Engineering with 13+ years of relevant industry experience.
Compensation and Benefits The annual base salary range for this position is
$163,800 - $262,000 . This position is also eligible for a discretionary annual bonus and equity in accordance with equity plan documents and equity award agreements. Broadcom offers a comprehensive benefits package including medical, dental and vision plans, 401(k) participation with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave, and vacation time.
#J-18808-Ljbffr
Broadcom's ASIC Product Division is seeking candidates for a DFT Quality Engineer position at our San Jose design center in CA. In this role, you will play a crucial part in ensuring the Quality, Yield & Test Costs in our products through Research & Development of comprehensive Design for Test (DFT) structures, patterns & test strategies. You will work collaboratively with cross‑functional teams & customers to develop, implement, and validate DFT methodologies, guaranteeing that our products meet the highest quality standards.
Key Responsibilities
Collaborate with Key HPC/AI customers to drive test, quality and reliability improvements, including in‑field failures (e.g., Silent Data Corruption).
Use the RMA process and ATE characterization to develop and drive improvements, including fault diagnosis and root‑cause analysis.
Drive production test improvements for quality & cost/test time, including data collection & analysis.
Implement best methods into production, such as fault models, test conditions, optimized test content across test steps, wafer/test, final test and SLT.
Collaborate with customers on board, system, and in‑field results to improve chip/ATE/SLT testing.
Perform data analytics for test/yield optimization (outlier analysis, etc.).
Stay informed about test industry trends (e.g., SLT) and emerging DFT/fault model methods; represent Broadcom as an industry leader by collaborating with HPC/AI customers, EDA companies, and industry peers.
Cross‑functional collaboration with Test Engineering, Global Operations, Design Integration, and IP developers.
Identify and define critical testability requirements with design and architecture teams.
Document new learnings, processes, results, and best practices.
Assist with silicon failure analysis, diagnostics & yield improvement efforts.
Interface with customers, physical design, test engineering, and manufacturing teams across multiple geographies; work closely with IP DFT engineers & other stakeholders.
Skills / Experience
Strong background in DFT (e.g., Analog DFT, MBIST, IEEE1687).
Proven experience in DFT implementation & verification.
Understanding of DFT methodologies, including scan, BIST, and ATPG.
Proficiency in simulation tools and scripting languages (Perl, Python, TCL, Ruby).
Strong communication and teamwork abilities.
Experience working on ATE is a plus.
Solid knowledge in analog and digital circuit design, and device physics fundamentals.
Excellent problem‑solving, debugging, root‑cause analysis and communication skills.
Education & Experience
Bachelor's in Electrical/Electronic/Computer Engineering with 15+ years of relevant industry experience OR Master’s in Electrical/Electronic/Computer Engineering with 13+ years of relevant industry experience.
Compensation and Benefits The annual base salary range for this position is
$163,800 - $262,000 . This position is also eligible for a discretionary annual bonus and equity in accordance with equity plan documents and equity award agreements. Broadcom offers a comprehensive benefits package including medical, dental and vision plans, 401(k) participation with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave, and vacation time.
#J-18808-Ljbffr