Senior ASIC Test & DFT Architect (Pre-P0)

A leading technology company in San Jose is seeking an experienced DFT Engineer to develop test strategies for ASICs and 2.5D SiPs. The role requires over 15 years of experience in ASIC testability, focusing on design-for-test solutions that ensure high test coverage. Responsibilities include collaborating with engineering teams, influencing supplier testing, and addressing complex testing challenges. Ideal candidates have a strong background in DFT techniques, excellent communication skills, and the ability to work in a fast-paced environment. #J-18808-Ljbffr