Senior Power Systems Engineer — Low-Power FPGA & Modeling

A leading technology firm in San Jose is seeking a Senior System Power Engineer to design and analyze low-power hardware and software systems. This role involves developing power models, establishing benchmarks, and mentoring junior engineers. Ideal candidates will have strong experience in FPGA system design, power analysis, and proficiency in VHDL or Verilog. A competitive salary between $175,000 and $219,000 is offered, along with comprehensive benefits in a collaborative and innovative environment. #J-18808-Ljbffr