Collabera
Base pay range
$80.00/hr - $100.00/hr
Job Summary The Senior Staff ASIC Engineer will provide advanced technical leadership throughout the full ASIC design lifecycle for high-performance, low-power products. This role involves developing IP block-level solutions, collaborating across engineering functions, and producing highly detailed documentation. The ideal candidate brings deep experience in C++ and SystemVerilog, along with hands-on ASIC design verification and productization expertise.
Key Responsibilities
Define, model, design, optimize, verify, validate, implement, and document IP development for complex ASIC products
Create architecture specifications, logic designs, and simulations based on system-level requirements
Collaborate with functional partners to develop implementation strategies aligned with system needs
Evaluate design processes including synthesis, place and route, timing, power, and verification flows
Utilize RTL to GDS and similar tools to design multiple complex blocks or SoC packages
Write and review detailed technical documentation for advanced ASIC and EDA development
Provide supervision, guidance, and technical mentorship to engineering team members
Required Qualifications
Bachelor’s degree in Science, Engineering, or related field with related experience in ASIC design, verification, validation, or integration
Expert experience in C++ programming
Hands‑on experience with SystemVerilog and RTL design
Experience with ASIC architecture, integration, and design flows
Experience debugging and documenting complex ASIC or software environments
Experience with software productization
Preferred Qualifications
Knowledge of artificial intelligence and applied machine learning concepts
Experience with Verilog, UVM, assertions, coverage, and constraints
Familiarity with Portable Stimulus Standard
Benefits The Company offers the following benefits for this position, subject to applicable eligibility requirements: medical insurance, dental insurance, vision insurance, 401(k) retirement plan, life insurance, long‑term disability insurance, short‑term disability insurance, paid parking/public transportation, paid time off, paid sick and safe time, hours of paid vacation time, weeks of paid parental leave, and paid holidays annually – as applicable.
Seniority level Mid‑Senior level
Employment type Contract
Job function Information Technology and Science
Industries Semiconductor Manufacturing
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Job Summary The Senior Staff ASIC Engineer will provide advanced technical leadership throughout the full ASIC design lifecycle for high-performance, low-power products. This role involves developing IP block-level solutions, collaborating across engineering functions, and producing highly detailed documentation. The ideal candidate brings deep experience in C++ and SystemVerilog, along with hands-on ASIC design verification and productization expertise.
Key Responsibilities
Define, model, design, optimize, verify, validate, implement, and document IP development for complex ASIC products
Create architecture specifications, logic designs, and simulations based on system-level requirements
Collaborate with functional partners to develop implementation strategies aligned with system needs
Evaluate design processes including synthesis, place and route, timing, power, and verification flows
Utilize RTL to GDS and similar tools to design multiple complex blocks or SoC packages
Write and review detailed technical documentation for advanced ASIC and EDA development
Provide supervision, guidance, and technical mentorship to engineering team members
Required Qualifications
Bachelor’s degree in Science, Engineering, or related field with related experience in ASIC design, verification, validation, or integration
Expert experience in C++ programming
Hands‑on experience with SystemVerilog and RTL design
Experience with ASIC architecture, integration, and design flows
Experience debugging and documenting complex ASIC or software environments
Experience with software productization
Preferred Qualifications
Knowledge of artificial intelligence and applied machine learning concepts
Experience with Verilog, UVM, assertions, coverage, and constraints
Familiarity with Portable Stimulus Standard
Benefits The Company offers the following benefits for this position, subject to applicable eligibility requirements: medical insurance, dental insurance, vision insurance, 401(k) retirement plan, life insurance, long‑term disability insurance, short‑term disability insurance, paid parking/public transportation, paid time off, paid sick and safe time, hours of paid vacation time, weeks of paid parental leave, and paid holidays annually – as applicable.
Seniority level Mid‑Senior level
Employment type Contract
Job function Information Technology and Science
Industries Semiconductor Manufacturing
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