Renesas Electronics
Senior Device Design & Integration Engineer
Renesas Electronics, Goleta, California, us, 93116
Senior Device Design & Integration Engineer
1 day ago Be among the first 25 applicants
Job Description This role will work in our Device and Product Group supporting New Technology Introduction (NTI) of our next‑gen GaN semiconductor devices. The engineer will be responsible for high‑voltage device design (including epi materials), chip layout, FET selection, and package considerations to meet cost, performance and reliability specifications. The engineer will also be responsible for successful qualification of new technology platforms, including generating test and qualification protocols, analyzing test data, lifetime test campaigns, and physics‑based models of reliability and lifetime.
Responsibilities
High‑voltage GaN device design for cost, performance, and reliability
GaN chip design including unit‑cell, metal bus, pad layout to meet RON, capacitance, and current density specifications
Product design including assembly considerations such as thermals, wire‑bonds, mechanical reliability, and FET selection
Work with TCAD and SPICE simulation teams to identify key factors for performance competitiveness of the platform
Generate test and qualification protocols, lifetime test protocols, and analyze test data during platform development
Ensure successful platform qualification, including root‑cause analysis of reliability or quality issues
Provide physics‑based models of platform reliability and lifetime
Generate reports to summarize technical information and present in meetings
Collaborate across teams—including epi, reliability, quality, assembly, and simulation—to introduce technology platforms that meet cost, performance, and reliability requirements
Qualifications
PhD or MS (+3 years experience) in Electrical Engineering or related fields
Strong familiarity with GaN device physics, layout, and characterization
Proficient in data manipulation and analysis; familiarity with JMP or Python is a plus
Exceptional verbal and written communication skills
Self‑motivated and adaptable; able to work independently as well as in a team environment
Familiarity with reliability physics and failure analysis is a plus
Familiarity with JEDEC and AEC‑Q101 qualification standards is a plus
Familiarity with Si MOSFET design is a plus
Renesas offers relocation for this role
Additional Information The expected annual pay range for this position is $100K - $120K. This position is also eligible for bonus opportunities. Please note that the final offer amount will depend on geographic location, applicable experience, and the candidate’s skillset.
Renesas offers a full range of elective benefits including medical, health savings account (with applicable medical plan), dental, vision, health and/or dependent care flexible spending accounts, pre‑tax commuter benefits, life insurance, AD&D, and pet insurance. In addition to elective benefit options, employees receive company‑paid life insurance and AD&D, LTD, short‑term medical benefits, paid sick time, paid holidays, and accrued paid vacation. New employees will attend a detailed benefit orientation to learn more about our many benefits and resources.
At Renesas, You Can
Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have opportunities to explore our hardware and software capabilities and try new things.
Make a real impact by developing innovative products and solutions that meet our global customers’ evolving needs and help make people’s lives easier, safe, and secure.
Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people‑first culture and global support system— including remote work options and Employee Resource Groups—will help you excel from day one.
Are you ready to own your success and make your mark? Join Renesas.
Shape Your Future with Us .
Renesas Electronics is an equal‑opportunity and affirmative action employer, committed to celebrating diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by federal, state, or local law. For more information, please read our Diversity & Inclusion Statement.
Renesas Electronics deals with dual‑use technology that is subject to U.S. export controls regulations. Under these regulations, it may be necessary for Renesas to obtain a U.S. government export license prior to releasing technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.
We have adopted a hybrid model that gives employees the ability to work remotely two days a week while ensuring that we come together as a team in the office the rest of the time. The designated in‑office days are Tuesday through Thursday for innovation, collaboration, and continuous learning.
Seniority level Mid‑Senior level
Employment type Full‑time
Job function Manufacturing
Industries Semiconductors
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Job Description This role will work in our Device and Product Group supporting New Technology Introduction (NTI) of our next‑gen GaN semiconductor devices. The engineer will be responsible for high‑voltage device design (including epi materials), chip layout, FET selection, and package considerations to meet cost, performance and reliability specifications. The engineer will also be responsible for successful qualification of new technology platforms, including generating test and qualification protocols, analyzing test data, lifetime test campaigns, and physics‑based models of reliability and lifetime.
Responsibilities
High‑voltage GaN device design for cost, performance, and reliability
GaN chip design including unit‑cell, metal bus, pad layout to meet RON, capacitance, and current density specifications
Product design including assembly considerations such as thermals, wire‑bonds, mechanical reliability, and FET selection
Work with TCAD and SPICE simulation teams to identify key factors for performance competitiveness of the platform
Generate test and qualification protocols, lifetime test protocols, and analyze test data during platform development
Ensure successful platform qualification, including root‑cause analysis of reliability or quality issues
Provide physics‑based models of platform reliability and lifetime
Generate reports to summarize technical information and present in meetings
Collaborate across teams—including epi, reliability, quality, assembly, and simulation—to introduce technology platforms that meet cost, performance, and reliability requirements
Qualifications
PhD or MS (+3 years experience) in Electrical Engineering or related fields
Strong familiarity with GaN device physics, layout, and characterization
Proficient in data manipulation and analysis; familiarity with JMP or Python is a plus
Exceptional verbal and written communication skills
Self‑motivated and adaptable; able to work independently as well as in a team environment
Familiarity with reliability physics and failure analysis is a plus
Familiarity with JEDEC and AEC‑Q101 qualification standards is a plus
Familiarity with Si MOSFET design is a plus
Renesas offers relocation for this role
Additional Information The expected annual pay range for this position is $100K - $120K. This position is also eligible for bonus opportunities. Please note that the final offer amount will depend on geographic location, applicable experience, and the candidate’s skillset.
Renesas offers a full range of elective benefits including medical, health savings account (with applicable medical plan), dental, vision, health and/or dependent care flexible spending accounts, pre‑tax commuter benefits, life insurance, AD&D, and pet insurance. In addition to elective benefit options, employees receive company‑paid life insurance and AD&D, LTD, short‑term medical benefits, paid sick time, paid holidays, and accrued paid vacation. New employees will attend a detailed benefit orientation to learn more about our many benefits and resources.
At Renesas, You Can
Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have opportunities to explore our hardware and software capabilities and try new things.
Make a real impact by developing innovative products and solutions that meet our global customers’ evolving needs and help make people’s lives easier, safe, and secure.
Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people‑first culture and global support system— including remote work options and Employee Resource Groups—will help you excel from day one.
Are you ready to own your success and make your mark? Join Renesas.
Shape Your Future with Us .
Renesas Electronics is an equal‑opportunity and affirmative action employer, committed to celebrating diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by federal, state, or local law. For more information, please read our Diversity & Inclusion Statement.
Renesas Electronics deals with dual‑use technology that is subject to U.S. export controls regulations. Under these regulations, it may be necessary for Renesas to obtain a U.S. government export license prior to releasing technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.
We have adopted a hybrid model that gives employees the ability to work remotely two days a week while ensuring that we come together as a team in the office the rest of the time. The designated in‑office days are Tuesday through Thursday for innovation, collaboration, and continuous learning.
Seniority level Mid‑Senior level
Employment type Full‑time
Job function Manufacturing
Industries Semiconductors
#J-18808-Ljbffr