TPI Global Solutions
Hybrid Role: 2-3 days in Office
Remote OK but preferably in PST time zone.
Interview - Phone Interview followed by (2) MS Teams technical interviews. Candidate needs to be on camera.
Top Must Have Skills:
Solid minimum 8 + years Design Verification Experience Verification Experience with DDR5 Controller /PHY System Verilog /UVM - Language Skills THE ROLE:
We are looking for an adaptive, self-motivative Design Verification Engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve ***'s abilities to deliver the highest quality, industry-leading technologies to market. Be a part of a team that delivers Industry leading IP and help our experts in RTL, FW, circuit, and architecture teams develop leading edge and differentiating IPs. THE PERSON:
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player with excellent communication skills and experience collaborating with engineers across different sites/time zones. You have strong analytical and problem-solving skills, are willing to learn, and ready to take on challenges. KEY RESPONSIBILITIES:
Develop/Maintain tests for functional verification. Build directed and random verification tests, debug test failures to determine root cause, and work with RTL and firmware engineers to resolve design defects and correct any test issues. Work on functional & code coverage verification. Provide technical support to other teams. PREFERRED EXPERIENCE:
Experience with C/C++ Experience with Verilog, System Verilog, and modern verification libraries like UVM 10+ years of ASIC design verification experience Experience/background with DDR or Memory Controller; PHY Verification is a plus Experience with scripting languages like Python, Perl and TCL is a plus. Collaborate with architects, hardware engineers, and firmware engineers to understand new features to be verified. Understanding of Design for Test methodologies and DFT verification experience is a plus. Proficient in debugging firmware and RTL code using simulation tools. ACADEMIC CREDENTIALS:
Bachelor’s or master’s degree in computer engineering/Electrical Engineering Seniority Level
Mid-Senior level Employment Type
Contract Job Function
Information Technology and Manufacturing Industries: Staffing and Recruiting, Semiconductor Manufacturing, and Computers and Electronics Manufacturing
#J-18808-Ljbffr
Solid minimum 8 + years Design Verification Experience Verification Experience with DDR5 Controller /PHY System Verilog /UVM - Language Skills THE ROLE:
We are looking for an adaptive, self-motivative Design Verification Engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve ***'s abilities to deliver the highest quality, industry-leading technologies to market. Be a part of a team that delivers Industry leading IP and help our experts in RTL, FW, circuit, and architecture teams develop leading edge and differentiating IPs. THE PERSON:
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player with excellent communication skills and experience collaborating with engineers across different sites/time zones. You have strong analytical and problem-solving skills, are willing to learn, and ready to take on challenges. KEY RESPONSIBILITIES:
Develop/Maintain tests for functional verification. Build directed and random verification tests, debug test failures to determine root cause, and work with RTL and firmware engineers to resolve design defects and correct any test issues. Work on functional & code coverage verification. Provide technical support to other teams. PREFERRED EXPERIENCE:
Experience with C/C++ Experience with Verilog, System Verilog, and modern verification libraries like UVM 10+ years of ASIC design verification experience Experience/background with DDR or Memory Controller; PHY Verification is a plus Experience with scripting languages like Python, Perl and TCL is a plus. Collaborate with architects, hardware engineers, and firmware engineers to understand new features to be verified. Understanding of Design for Test methodologies and DFT verification experience is a plus. Proficient in debugging firmware and RTL code using simulation tools. ACADEMIC CREDENTIALS:
Bachelor’s or master’s degree in computer engineering/Electrical Engineering Seniority Level
Mid-Senior level Employment Type
Contract Job Function
Information Technology and Manufacturing Industries: Staffing and Recruiting, Semiconductor Manufacturing, and Computers and Electronics Manufacturing
#J-18808-Ljbffr