OSI Engineering
Product & Test Development Engineer (Semiconductor)
OSI Engineering, San Jose, California, United States, 95199
Direct message the job poster from OSI Engineering
A premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional Staff Test Engineer to join our Operations team in San Jose, CA.
This position offers a hybrid work model, with an exception of three days onsite each week and two days remote.
Responsibilities
Define the Test plan and work with design to ensure good Test coverage.
Effective communications skills with internal cross functional teams, customers and suppliers.
Able to design ATE hardware for NPI support, including Load Board, probe card, interface.
Complete life cycle of products from design, prototypes, high volume manufacturing bring up and RMA/sustaining support.
Optimize yield, Test time and multi-site count.
Qualifications
B.S./M.S. in Electrical Engineering or equivalent experience.
Experience with Test coverage and DFT (Scan/ATPG/JTAG/BIST).
Experience working with Local and offshore OSAT's.
Experience and in-depth knowledge of Advantest V93k.
Experience on Smartest, Redhat and GIT/SVN.
Ability to independently learn and problem solve.
Comfort with collaboration, open communication and reaching across functional borders.
Preferred Qualifications
Experience in DDR and High-speed Digital products preferred.
Location San Jose, CA
Relocation assistance will be provided and will be based on your current location.
Schedule 3 days onsite, 2 days remote
Salary Up to ~$177K (dependent on experience)
Seniority level Mid-Senior level
Employment type Full-time
Industry Semiconductor Manufacturing
Referrals increase your chances of interviewing at OSI Engineering by 2x.
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A premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional Staff Test Engineer to join our Operations team in San Jose, CA.
This position offers a hybrid work model, with an exception of three days onsite each week and two days remote.
Responsibilities
Define the Test plan and work with design to ensure good Test coverage.
Effective communications skills with internal cross functional teams, customers and suppliers.
Able to design ATE hardware for NPI support, including Load Board, probe card, interface.
Complete life cycle of products from design, prototypes, high volume manufacturing bring up and RMA/sustaining support.
Optimize yield, Test time and multi-site count.
Qualifications
B.S./M.S. in Electrical Engineering or equivalent experience.
Experience with Test coverage and DFT (Scan/ATPG/JTAG/BIST).
Experience working with Local and offshore OSAT's.
Experience and in-depth knowledge of Advantest V93k.
Experience on Smartest, Redhat and GIT/SVN.
Ability to independently learn and problem solve.
Comfort with collaboration, open communication and reaching across functional borders.
Preferred Qualifications
Experience in DDR and High-speed Digital products preferred.
Location San Jose, CA
Relocation assistance will be provided and will be based on your current location.
Schedule 3 days onsite, 2 days remote
Salary Up to ~$177K (dependent on experience)
Seniority level Mid-Senior level
Employment type Full-time
Industry Semiconductor Manufacturing
Referrals increase your chances of interviewing at OSI Engineering by 2x.
#J-18808-Ljbffr