Inspire Semiconductor, Inc.
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SoC Design Engineer
role at
Inspire Semiconductor, Inc.
1 day ago Be among the first 25 applicants
About Us At InspireSemi, we're not just building chips; we're revolutionizing high-performance computing. Our groundbreaking architecture packs thousands of 64‑bit CPU cores onto a single chip, all seamlessly connected. We're driven by a mission to make high performance computing more accessible, energy‑efficient, and easier for developers to harness. Ready to make a real impact? Join our passionate team!
Why Join InspireSemi?
Be a Pioneer: Get in on the ground floor of a hyper‑growth startup! You'll be part of a small, dynamic team shaping the future of computing.
Make an Impact: Your work will directly contribute to disruptive technology.
Grow With Us: Seize significant growth and development opportunities.
Rewarding Compensation: We offer a competitive salary, bonus potential, and meaningful equity.
Flexibility: Benefit from a hybrid work model (with potential for fully remote for exceptional candidates) and flexible time off.
The Opportunity We're looking for a talented and driven SoC Design Engineer to take charge of the front‑end design and integration of our cutting‑edge System‑on‑Chip (SoC). This is a hands‑on role where you'll work on everything from our RISC‑V CPU cores and network integration to potentially shaping our core architecture and cache hierarchy.
What You’ll Do
Spearhead system‑level design: Own the specification, RTL, and documentation.
Integrate key components: Integrate memory, PCIe, networking controllers, PHYs, and other IP.
Master timing, power, and clocks: Develop timing constraints and plan power/clock domains.
Ensure quality: Perform linting and front‑end verification (RTL, constraints, CDC, etc.).
Optimize for performance: Drive synthesis and PPA (Power, Performance, Area) optimization.
Collaborate across teams: Work closely with physical design on floorplanning and signoff, and with verification on testbenches and debugging.
Innovate our workflows: Continuously improve our build flows and automation.
Mentor and lead: Guide junior engineers and contractors.
What You Bring
A Bachelor’s or Master’s degree in Electrical or Computer Engineering.
7+ years of solid experience in SoC design, especially with datacenter CPUs or accelerators.
Top‑notch RTL design skills using SystemVerilog.
A deep understanding of computer system architecture.
Expertise in common bus protocols (like AXI, AHB, PCIe, DDR4/5).
Strong scripting/programming abilities (Python, C/C++, TCL).
Familiarity with tools like git/Bitbucket, Jira, and Confluence.
Excellent communication and teamwork skills – you thrive in collaborative environments!
Bonus Points
Experience with the Cadence EDA toolchain (Genus, Xcelium, Conformal, Innovus).
Knowledge of CPU core architecture, especially RISC‑V ISA.
Understanding of coherent cache systems and Networks‑on‑Chip.
Experience with low‑power design techniques.
Familiarity with DFT insertion and ATPG (Modus).
Experience with FPGA prototyping.
If you're excited about pushing the boundaries of computing and working on truly innovative technology in a rewarding environment, we'd love to hear from you!
#J-18808-Ljbffr
SoC Design Engineer
role at
Inspire Semiconductor, Inc.
1 day ago Be among the first 25 applicants
About Us At InspireSemi, we're not just building chips; we're revolutionizing high-performance computing. Our groundbreaking architecture packs thousands of 64‑bit CPU cores onto a single chip, all seamlessly connected. We're driven by a mission to make high performance computing more accessible, energy‑efficient, and easier for developers to harness. Ready to make a real impact? Join our passionate team!
Why Join InspireSemi?
Be a Pioneer: Get in on the ground floor of a hyper‑growth startup! You'll be part of a small, dynamic team shaping the future of computing.
Make an Impact: Your work will directly contribute to disruptive technology.
Grow With Us: Seize significant growth and development opportunities.
Rewarding Compensation: We offer a competitive salary, bonus potential, and meaningful equity.
Flexibility: Benefit from a hybrid work model (with potential for fully remote for exceptional candidates) and flexible time off.
The Opportunity We're looking for a talented and driven SoC Design Engineer to take charge of the front‑end design and integration of our cutting‑edge System‑on‑Chip (SoC). This is a hands‑on role where you'll work on everything from our RISC‑V CPU cores and network integration to potentially shaping our core architecture and cache hierarchy.
What You’ll Do
Spearhead system‑level design: Own the specification, RTL, and documentation.
Integrate key components: Integrate memory, PCIe, networking controllers, PHYs, and other IP.
Master timing, power, and clocks: Develop timing constraints and plan power/clock domains.
Ensure quality: Perform linting and front‑end verification (RTL, constraints, CDC, etc.).
Optimize for performance: Drive synthesis and PPA (Power, Performance, Area) optimization.
Collaborate across teams: Work closely with physical design on floorplanning and signoff, and with verification on testbenches and debugging.
Innovate our workflows: Continuously improve our build flows and automation.
Mentor and lead: Guide junior engineers and contractors.
What You Bring
A Bachelor’s or Master’s degree in Electrical or Computer Engineering.
7+ years of solid experience in SoC design, especially with datacenter CPUs or accelerators.
Top‑notch RTL design skills using SystemVerilog.
A deep understanding of computer system architecture.
Expertise in common bus protocols (like AXI, AHB, PCIe, DDR4/5).
Strong scripting/programming abilities (Python, C/C++, TCL).
Familiarity with tools like git/Bitbucket, Jira, and Confluence.
Excellent communication and teamwork skills – you thrive in collaborative environments!
Bonus Points
Experience with the Cadence EDA toolchain (Genus, Xcelium, Conformal, Innovus).
Knowledge of CPU core architecture, especially RISC‑V ISA.
Understanding of coherent cache systems and Networks‑on‑Chip.
Experience with low‑power design techniques.
Familiarity with DFT insertion and ATPG (Modus).
Experience with FPGA prototyping.
If you're excited about pushing the boundaries of computing and working on truly innovative technology in a rewarding environment, we'd love to hear from you!
#J-18808-Ljbffr