MHM Publishing Inc
Staff Digital Verification Engineer
MHM Publishing Inc, Jessup, Maryland, United States, 20794
Location
Engineering | Jessup, Maryland, United States
Job Summary Northrop Grumman seeks a Staff Digital Verification Engineer to design and verify full‑custom digital and mixed‑signal superconducting processor circuits. The role focuses on HDL (VHDL/Verilog) and HVL (SystemVerilog) development, SystemVerilog Assertions (SVA), and Universal Verification Methodology (UVM) in a high‑performance computing environment.
Relocation and Travel Relocation assistance may be available. Clearance type: SCI. Travel: Yes, 10% of the time.
Responsibilities Work onsite in Linthicum, MD on verification for superconducting processor designs. Design and implement testbenches using HDL/HVL, SVA, and UVM. Employ coverage‑driven verification methods from planning through closure, and interface with industry‑standard protocols. Collaborate with engineers and scientists to transform computing beyond Moore’s Law.
Qualifications
Bachelor’s degree in a technical area (BSEE or other engineering discipline preferred).
12 years of relevant experience (10 years with a technical MS; 7 years with a PhD).
Proficiency in HDL (VHDL/Verilog) and HVL (SystemVerilog).
Experience with SystemVerilog Assertions (SVA) and Universal Verification Methodology (UVM).
Familiarity with a coverage‑driven verification methodology from planning through closure.
Knowledge of industry‑standard interfaces.
Experience with object‑oriented programming languages and concepts.
Strong written and oral communication skills.
U.S. Citizen, able to obtain and maintain a security clearance.
Preferred Qualifications
Advanced Degree (MS or PhD).
Experience with Mentor Graphics and/or Cadence Verification tools.
Experience with FPGA/ASIC design.
Experience with scripting languages (Bash, Perl, Python, Tcl).
Current security clearance.
Benefits
Health Plan
Savings Plan
Paid Time Off (PTO)
Additional benefits including Education Assistance, Training and Development
9/80 Work Schedule (where available)
Equal Opportunity Employer Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class.
EEO and pay transparency statement .
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Job Summary Northrop Grumman seeks a Staff Digital Verification Engineer to design and verify full‑custom digital and mixed‑signal superconducting processor circuits. The role focuses on HDL (VHDL/Verilog) and HVL (SystemVerilog) development, SystemVerilog Assertions (SVA), and Universal Verification Methodology (UVM) in a high‑performance computing environment.
Relocation and Travel Relocation assistance may be available. Clearance type: SCI. Travel: Yes, 10% of the time.
Responsibilities Work onsite in Linthicum, MD on verification for superconducting processor designs. Design and implement testbenches using HDL/HVL, SVA, and UVM. Employ coverage‑driven verification methods from planning through closure, and interface with industry‑standard protocols. Collaborate with engineers and scientists to transform computing beyond Moore’s Law.
Qualifications
Bachelor’s degree in a technical area (BSEE or other engineering discipline preferred).
12 years of relevant experience (10 years with a technical MS; 7 years with a PhD).
Proficiency in HDL (VHDL/Verilog) and HVL (SystemVerilog).
Experience with SystemVerilog Assertions (SVA) and Universal Verification Methodology (UVM).
Familiarity with a coverage‑driven verification methodology from planning through closure.
Knowledge of industry‑standard interfaces.
Experience with object‑oriented programming languages and concepts.
Strong written and oral communication skills.
U.S. Citizen, able to obtain and maintain a security clearance.
Preferred Qualifications
Advanced Degree (MS or PhD).
Experience with Mentor Graphics and/or Cadence Verification tools.
Experience with FPGA/ASIC design.
Experience with scripting languages (Bash, Perl, Python, Tcl).
Current security clearance.
Benefits
Health Plan
Savings Plan
Paid Time Off (PTO)
Additional benefits including Education Assistance, Training and Development
9/80 Work Schedule (where available)
Equal Opportunity Employer Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class.
EEO and pay transparency statement .
#J-18808-Ljbffr