Prodapt Solutions Private Limited
Senior Staff Emulation Engineer - ZEBU
Prodapt Solutions Private Limited, San Jose, California, United States, 95199
Overview
Prodapt is a global technology company and the largest specialized player in the Connectedness industry. As an AI-first strategic partner, Prodapt provides consulting, business transformation, and managed services to top telecom and tech enterprises.
Prodapt ASIC Services
is a leading provider of
SoC ASIC/FPGA and Embedded Software services . We offer
turnkey solutions, Offshore Design Centers (ODCs), and staff augmentation
across key areas like
RTL Design, UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up . Our embedded services include firmware, device drivers, RTOS porting, and board bring-up. A “Great Place To Work®Certified™” company, Prodapt employs over 6,000 technology and domain experts in 30+ countries. Prodapt is part of the 130‑year‑old business conglomerate The Jhaver Group, which employs over 32,000 people across 80+ locations globally.
Prodapt is looking for a Senior Emulation Engineer who has recent experience working on Synopsys ZEBU tools.
Location: San Jose, CA/Remote
Responsibilities What you’ll be doing:
The Emulation engineer will be responsible for validation of Emulation product (ZeBu) and various solutions for emulation products.
The engineer will also design and develop tests in VHDL/Verilog/System Verilog languages, resolving synthesis and P&R with FPGA to validate the tools.
Responsible for analysing customer designs & in‑house, modifying full-chip/block‑level test benches, executing verification plans, analysis/debugging RTL, and gate‑level emulation failures, performing gate‑level emulations, interacting with R&D and other teams.
Engineer will also be responsible for developing validation strategy and coverage driven plan for newer solutions and take it to production working with R&D and other teams.
Requirements
BE/ME in Electronics or Electrical and communication engineering with 10+ years hands‑on experience in emulation/simulation and verification IPs.
Knowledge on areas like Synthesis, Simulation, Verification, place and route with FPGA is preferred. Knowledge and experience on Hardware emulation tool or experience in verification technology, testcase creation, simulation using VCS or other simulators, debugging with Verdi/DVE is must.
Must be proficient multi-taskers to ensure all aspects of engineering a product are addressed. Familiarity with scripting languages, verification IP protocols are a plus.
Should have good analytical, logical, organization and communication skills for interacting with R&D and other teams.
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Prodapt ASIC Services
is a leading provider of
SoC ASIC/FPGA and Embedded Software services . We offer
turnkey solutions, Offshore Design Centers (ODCs), and staff augmentation
across key areas like
RTL Design, UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up . Our embedded services include firmware, device drivers, RTOS porting, and board bring-up. A “Great Place To Work®Certified™” company, Prodapt employs over 6,000 technology and domain experts in 30+ countries. Prodapt is part of the 130‑year‑old business conglomerate The Jhaver Group, which employs over 32,000 people across 80+ locations globally.
Prodapt is looking for a Senior Emulation Engineer who has recent experience working on Synopsys ZEBU tools.
Location: San Jose, CA/Remote
Responsibilities What you’ll be doing:
The Emulation engineer will be responsible for validation of Emulation product (ZeBu) and various solutions for emulation products.
The engineer will also design and develop tests in VHDL/Verilog/System Verilog languages, resolving synthesis and P&R with FPGA to validate the tools.
Responsible for analysing customer designs & in‑house, modifying full-chip/block‑level test benches, executing verification plans, analysis/debugging RTL, and gate‑level emulation failures, performing gate‑level emulations, interacting with R&D and other teams.
Engineer will also be responsible for developing validation strategy and coverage driven plan for newer solutions and take it to production working with R&D and other teams.
Requirements
BE/ME in Electronics or Electrical and communication engineering with 10+ years hands‑on experience in emulation/simulation and verification IPs.
Knowledge on areas like Synthesis, Simulation, Verification, place and route with FPGA is preferred. Knowledge and experience on Hardware emulation tool or experience in verification technology, testcase creation, simulation using VCS or other simulators, debugging with Verdi/DVE is must.
Must be proficient multi-taskers to ensure all aspects of engineering a product are addressed. Familiarity with scripting languages, verification IP protocols are a plus.
Should have good analytical, logical, organization and communication skills for interacting with R&D and other teams.
#J-18808-Ljbffr