Prodapt Solutions Private Limited
Sr. Design Verification Engineer
Prodapt Solutions Private Limited, San Jose, California, United States, 95199
Overview
Prodapt is a global technology company and the largest specialized player in the Connectedness industry. As an AI-first strategic partner, Prodapt provides consulting, business transformation, and managed services to top telecom and tech enterprises.
Prodapt ASIC Services
is a leading provider of
SoC ASIC/FPGA and Embedded Software services . We offer
turnkey solutions, Offshore Design Centers (ODCs), and staff augmentation
across key areas like
RTL Design, UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up . Our embedded services include firmware, device drivers, RTOS porting, and board bring-up.
Prodapt is seeking a highly skilled and adaptable engineer to join our dynamic team, focusing on System-on-Chip (SoC) verification. In this role, you will work on complex SoC designs and collaborate with various teams to ensure the successful development and validation of our products.
Sunnyvale, CA or Austin, TX
2 year Project
Responsibilities
Collaborate with cross-functional teams to ensure the effective verification of complex SoC designs.
UVM Expertise
Develop and maintain scripts using languages like Perl, Python, Unix shells, and Makefiles to automate testing and verification processes.
Gain an in-depth understanding of high-speed interfaces, including PCIe, USB, NOC, NVMe, Ethernet, LPDDR5, and HBM2, to ensure seamless integration into complex SoC designs.
Collaborate with lab managers to set up and manage the necessary infrastructure for emulation and verification activities.
Contribute to the development of comprehensive verification plans, testbenches, and methodologies.
Identify and propose improvements to streamline the emulation and verification process.
Requirements
Bachelor's or higher degree in Electrical Engineering, Computer Science, or a related field.
✔8+yearsofSystemVerilog/UVMexperience (IP,sub-system,orSoClevelverification)
✔Strongscriptingskills (Python,TCL,Perl,Shell)forautomationandtooldevelopment
✔EDAtoolexpertise (VCS,Xcelium,Questa,Verdi,Spyglass,etc.)
✔Experienceindebugging,root-causeanalysis,anddrivingverificationclosure
✔FamiliaritywithCPU/GPUverification,AI/ML,Networking,ormicro-architecturalperformanceverificationisaplus
✔High-speedinterfaceverification (PCIe,DDR,HBM,Ethernet,RoCE)preferred
#J-18808-Ljbffr
Prodapt ASIC Services
is a leading provider of
SoC ASIC/FPGA and Embedded Software services . We offer
turnkey solutions, Offshore Design Centers (ODCs), and staff augmentation
across key areas like
RTL Design, UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up . Our embedded services include firmware, device drivers, RTOS porting, and board bring-up.
Prodapt is seeking a highly skilled and adaptable engineer to join our dynamic team, focusing on System-on-Chip (SoC) verification. In this role, you will work on complex SoC designs and collaborate with various teams to ensure the successful development and validation of our products.
Sunnyvale, CA or Austin, TX
2 year Project
Responsibilities
Collaborate with cross-functional teams to ensure the effective verification of complex SoC designs.
UVM Expertise
Develop and maintain scripts using languages like Perl, Python, Unix shells, and Makefiles to automate testing and verification processes.
Gain an in-depth understanding of high-speed interfaces, including PCIe, USB, NOC, NVMe, Ethernet, LPDDR5, and HBM2, to ensure seamless integration into complex SoC designs.
Collaborate with lab managers to set up and manage the necessary infrastructure for emulation and verification activities.
Contribute to the development of comprehensive verification plans, testbenches, and methodologies.
Identify and propose improvements to streamline the emulation and verification process.
Requirements
Bachelor's or higher degree in Electrical Engineering, Computer Science, or a related field.
✔8+yearsofSystemVerilog/UVMexperience (IP,sub-system,orSoClevelverification)
✔Strongscriptingskills (Python,TCL,Perl,Shell)forautomationandtooldevelopment
✔EDAtoolexpertise (VCS,Xcelium,Questa,Verdi,Spyglass,etc.)
✔Experienceindebugging,root-causeanalysis,anddrivingverificationclosure
✔FamiliaritywithCPU/GPUverification,AI/ML,Networking,ormicro-architecturalperformanceverificationisaplus
✔High-speedinterfaceverification (PCIe,DDR,HBM,Ethernet,RoCE)preferred
#J-18808-Ljbffr