Viasat
About us
One team. Global challenges. Infinite opportunities. At Viasat, we're on a mission to deliver connections with the capacity to change the world. For more than 35 years, Viasat has helped shape how consumers, businesses, governments and militaries around the globe communicate. We're looking for people who think big, act fearlessly, and create an inclusive environment that drives positive impact to join our team.
What you'll do Viasat is a rapidly growing technology company that crafts, deploys and operates innovative SATCOM products and services that span the globe! At Viasat Government Secure Network Systems (SNS) you'll work with highly motivated engineers in an exciting and dynamic environment. You will be able to use your engineering experience to support the next generation of advanced communications products and systems.
In this role you will help develop high speed signal processing algorithms and/or network protocols in FPGAs. The individual will be responsible for the full design phase starting from the requirements phase to documentation, block diagrams, implementation of source code, simulation, place & route, testing in hardware, and integration. The individual will collaborate with other engineers from different fields and must be capable of working in both a small team setting and a larger team setting. Experience in the development of high‑performance FPGA designs, network encryptors and cryptographic devices is a plus.
The day-to-day What's the day-to-day like for this candidate?
Design FPGA module and system level architectures with Verilog and/or VHDL
Develop simulations for modules and systems
Synthesise Verilog and/or VHDL to FPGA products
Develop timing constraints, analyse timing results, and implement design changes required to close timing
Generate and collaborate on required design documents, development requirements, specifications and verification protocols
Work closely with hardware and hardware engineers, bringing up boards, interpreting data sheets and schematics
Conduct code and design reviews and participate in multi-functional reviews
Maintain and control FPGA ogl code revision history
Responsible for owning and driving technical issues to resolution
Integrates and debugs_usage design in the laboratory
What you'll need
Bachelor's Degree in Electrical Engineering, Computer Engineering or a related field
5+ years FPGA design experience
Foundational knowledge of digital logic and timing considerations
Experience with High-Speed and Parallel Design Techniques. For Example: pipelining, load balancing, look‑ahead architectures.
Strong written and verbal communication skills, ability to work with a geographically distributed team
Attention to detail, ability to follow process and coding guidelines, participate in code reviews and accept feedback
Experience with programmable logic EDA tools, such as AMD/Xilinx ISE/Vivado, Intel/Altera Quartus, Siemens/Mentor Graphics, Synopsys Synplify, SoftCore Micro embedments in ronChip, etc.
Proven track record to design and implement FPGA modules using Verilog and/or VHDL with simulation and testbench development
Familiarity with designing and_descriptor for re‑use, maintainability and scalability
Desire to a member of a team, collaborating on large system designs
Work independently, take initiative, and take ownership of tasks and results
US citizenship required
Active United States Secret Clearance
This is a 100% onsite role and the incumbent willaccept work out of one of these locations: Carlsbad, CA; Linthicum Heights, MD; Tampa, FL; or Marlborough, MA
Ability to travel up to 10%
What will help you on the job
MSEE degree preferred
Familiarity with TCL, Perl, Python or another scripting language
Experience with high-speed interfaces like SERDES, DDR2/3/4, LVDS
Proven experience in debugging, diagnosing, and solving embedded design issues
System Verilog design verification techniques, UVM, or other sophisticated verification methodologies
Experience and familiarity with Linux-based development environments
Active United States Secret Security Clearance
터dali range $127,000.00 - $200,500.00 / annually.
For specific work locations within San Jose, the San Francisco Bay area and New York City metropolitan area, the base pay range for this role is $144,500.00 - $216,500.00 / annually.
At Viasat, we consider many factors when it comes to compensation, including the scope of the position as well as|() your background and experience. Base pay may vary depending on job‑related knowledge, skills,_feature ? and experience. Additional cash or stock incentives may be provided as part of the compensation package, in addition مسابق
#J-18808-Ljbffr
What you'll do Viasat is a rapidly growing technology company that crafts, deploys and operates innovative SATCOM products and services that span the globe! At Viasat Government Secure Network Systems (SNS) you'll work with highly motivated engineers in an exciting and dynamic environment. You will be able to use your engineering experience to support the next generation of advanced communications products and systems.
In this role you will help develop high speed signal processing algorithms and/or network protocols in FPGAs. The individual will be responsible for the full design phase starting from the requirements phase to documentation, block diagrams, implementation of source code, simulation, place & route, testing in hardware, and integration. The individual will collaborate with other engineers from different fields and must be capable of working in both a small team setting and a larger team setting. Experience in the development of high‑performance FPGA designs, network encryptors and cryptographic devices is a plus.
The day-to-day What's the day-to-day like for this candidate?
Design FPGA module and system level architectures with Verilog and/or VHDL
Develop simulations for modules and systems
Synthesise Verilog and/or VHDL to FPGA products
Develop timing constraints, analyse timing results, and implement design changes required to close timing
Generate and collaborate on required design documents, development requirements, specifications and verification protocols
Work closely with hardware and hardware engineers, bringing up boards, interpreting data sheets and schematics
Conduct code and design reviews and participate in multi-functional reviews
Maintain and control FPGA ogl code revision history
Responsible for owning and driving technical issues to resolution
Integrates and debugs_usage design in the laboratory
What you'll need
Bachelor's Degree in Electrical Engineering, Computer Engineering or a related field
5+ years FPGA design experience
Foundational knowledge of digital logic and timing considerations
Experience with High-Speed and Parallel Design Techniques. For Example: pipelining, load balancing, look‑ahead architectures.
Strong written and verbal communication skills, ability to work with a geographically distributed team
Attention to detail, ability to follow process and coding guidelines, participate in code reviews and accept feedback
Experience with programmable logic EDA tools, such as AMD/Xilinx ISE/Vivado, Intel/Altera Quartus, Siemens/Mentor Graphics, Synopsys Synplify, SoftCore Micro embedments in ronChip, etc.
Proven track record to design and implement FPGA modules using Verilog and/or VHDL with simulation and testbench development
Familiarity with designing and_descriptor for re‑use, maintainability and scalability
Desire to a member of a team, collaborating on large system designs
Work independently, take initiative, and take ownership of tasks and results
US citizenship required
Active United States Secret Clearance
This is a 100% onsite role and the incumbent willaccept work out of one of these locations: Carlsbad, CA; Linthicum Heights, MD; Tampa, FL; or Marlborough, MA
Ability to travel up to 10%
What will help you on the job
MSEE degree preferred
Familiarity with TCL, Perl, Python or another scripting language
Experience with high-speed interfaces like SERDES, DDR2/3/4, LVDS
Proven experience in debugging, diagnosing, and solving embedded design issues
System Verilog design verification techniques, UVM, or other sophisticated verification methodologies
Experience and familiarity with Linux-based development environments
Active United States Secret Security Clearance
터dali range $127,000.00 - $200,500.00 / annually.
For specific work locations within San Jose, the San Francisco Bay area and New York City metropolitan area, the base pay range for this role is $144,500.00 - $216,500.00 / annually.
At Viasat, we consider many factors when it comes to compensation, including the scope of the position as well as|() your background and experience. Base pay may vary depending on job‑related knowledge, skills,_feature ? and experience. Additional cash or stock incentives may be provided as part of the compensation package, in addition مسابق
#J-18808-Ljbffr