US Tech Solutions
UVM/ SystemVerilog Design Verification Engineer
US Tech Solutions, Goleta, California, United States, 93117
Job Title
Job Description: The project relates to the design and verification of a custom controller for analog components. The controller has interfaces such as SPI, Ethernet and AXI to driven the internal components and send data. Responsibilities As a UVM/ SystemVerilog Design Verification Engineer, you will own functional verification for a custom controller. You will develop functional verification plans, create testbenches, and execute test cases to ensure the controller meets all specifications.
Job Description: The project relates to the design and verification of a custom controller for analog components. The controller has interfaces such as SPI, Ethernet and AXI to driven the internal components and send data. Responsibilities As a UVM/ SystemVerilog Design Verification Engineer, you will own functional verification for a custom controller. You will develop functional verification plans, create testbenches, and execute test cases to ensure the controller meets all specifications.