Astera Labs
Senior Signal/Power Integrity Engineer
Astera Labs - San Jose, California, United States, 95199
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Senior Signal/Power Integrity Engineer
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Senior Signal/Power Integrity Engineer
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Astera Labs Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL, and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at
www.asteralabs.com
.
At Astera Labs, we seek motivated
Senior SI/PI and System Validation Engineers
to work on our game-changing portfolio of connectivity products for Artificial Intelligence and Machine Learning applications. In this role, you will execute the SI planning, design, modeling, simulation, and lab validation with various system configurations. You will also formulate a comprehensive system validation plan and design experiments to root cause unexpected behavior, report results and specification compliance, and work with key internal customers to quantify margins and ensure robustness.
Basic Qualifications
Strong academic/technical background in electrical engineering; Bachelor’s is required; Master’s preferred. 2+ years of experience supporting or developing complex SoC/silicon products for Server, Storage, and Networking applications. 2+ years of hands-on high-speed SI/PI design, simulation, and measurement experience. We have a proven track record with defining hardware system constraints and high-speed technology roadmaps. Cross-functional design mentality with the silicon design community to develop systems. Self-starting, professional, and hands-on work ethic that can execute intense research in a dynamic environment. Proven track record solving problems independently, preferably as a tech lead. Entrepreneurial, open-minded behavior, and can-do attitude. Authorized to work in the US and start immediately.
Required Experience
Familiar with SI and PI design challenges for high-speed interconnects Hardware product design experience in networking, compute, or RF. 2D and 3D simulation experience with Cadence/Mentor/Ansys/ADS/etc. toolsets EM modeling of connector structures High-speed SERDES measurement, channel simulation, and equalization Expertise in DDR4/5 memory bus designs Expertise in multi-level and NRZ signaling, COM, BER, jitter analysis Familiar with VNA, TDR, real-time and sub-sampling oscilloscopes, etc. Working knowledge of PCB fabrication limits and trade-offs PI experience a bonus. Familiar with industry-standard such as IEEE802.3 Familiarity with PCIe5/6 and CXL specs, especially Electrical Compliance sections Working knowledge of key, high-speed design blocks such as PLLs, DFE, Tx EQ Experience in system testing, characterization, margin analysis, and optimization of high-speed PCIe/CXL data links over long and short channels In-depth understanding of DDR 4/5 protocols and JEDEC Standard. Hands-on experience with DDR4/5 post-silicon electrical validation. Proficiency in using high-speed lab equipment such as BERT, Oscilloscope, and VNA Strong debugging, analysis, and problem-solving skills with experience leading root cause and correction action teams. An inherent sense of urgency and accountability. Must have the ability to multi-task in a fast-paced environment.
The base salary range is $147,000 - $195,000. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities. Seniority level
Seniority level Mid-Senior level Employment type
Employment type Full-time Job function
Job function Engineering and Information Technology Industries Semiconductor Manufacturing Referrals increase your chances of interviewing at Astera Labs by 2x Sign in to set job alerts for “Power Engineer” roles.
Sunnyvale, CA $111,000.00-$164,000.00 2 weeks ago Fremont, CA $170,000.00-$240,000.00 4 days ago Mountain View, CA $40.00-$60.00 1 month ago Atherton, CA $150,000.00-$200,000.00 5 months ago Santa Clara, CA $140,000.00-$190,000.00 4 days ago Sunnyvale, CA $170,000.00-$240,000.00 2 weeks ago Hardware Engineer, Platforms, University Graduate
Sunnyvale, CA $105,000.00-$151,000.00 1 week ago Mountain View, CA $88,000.00-$165,500.00 1 year ago Newark, CA $110,000.00-$130,000.00 3 days ago San Francisco Bay Area $130,000.00-$150,000.00 3 weeks ago Mountain View, CA $150,000.00-$230,000.00 1 month ago Mountain View, CA $130,000.00-$160,000.00 1 month ago Electrical Engineer, Abuse & Test Engineering
Sunnyvale, CA $139,000.00-$200,000.00 2 weeks ago Electrical Hardware Engineer (New Grad/Early Career)
Mountain View, CA $100,000.00-$143,000.00 1 month ago Sunnyvale, CA $72,100.00-$114,700.00 1 week ago Fremont, CA $200,000.00-$210,000.00 2 weeks ago San Francisco Bay Area $120,000.00-$160,000.00 2 weeks ago We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.
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Senior Signal/Power Integrity Engineer
role at
Astera Labs 1 day ago Be among the first 25 applicants Join to apply for the
Senior Signal/Power Integrity Engineer
role at
Astera Labs Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL, and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at
www.asteralabs.com
.
At Astera Labs, we seek motivated
Senior SI/PI and System Validation Engineers
to work on our game-changing portfolio of connectivity products for Artificial Intelligence and Machine Learning applications. In this role, you will execute the SI planning, design, modeling, simulation, and lab validation with various system configurations. You will also formulate a comprehensive system validation plan and design experiments to root cause unexpected behavior, report results and specification compliance, and work with key internal customers to quantify margins and ensure robustness.
Basic Qualifications
Strong academic/technical background in electrical engineering; Bachelor’s is required; Master’s preferred. 2+ years of experience supporting or developing complex SoC/silicon products for Server, Storage, and Networking applications. 2+ years of hands-on high-speed SI/PI design, simulation, and measurement experience. We have a proven track record with defining hardware system constraints and high-speed technology roadmaps. Cross-functional design mentality with the silicon design community to develop systems. Self-starting, professional, and hands-on work ethic that can execute intense research in a dynamic environment. Proven track record solving problems independently, preferably as a tech lead. Entrepreneurial, open-minded behavior, and can-do attitude. Authorized to work in the US and start immediately.
Required Experience
Familiar with SI and PI design challenges for high-speed interconnects Hardware product design experience in networking, compute, or RF. 2D and 3D simulation experience with Cadence/Mentor/Ansys/ADS/etc. toolsets EM modeling of connector structures High-speed SERDES measurement, channel simulation, and equalization Expertise in DDR4/5 memory bus designs Expertise in multi-level and NRZ signaling, COM, BER, jitter analysis Familiar with VNA, TDR, real-time and sub-sampling oscilloscopes, etc. Working knowledge of PCB fabrication limits and trade-offs PI experience a bonus. Familiar with industry-standard such as IEEE802.3 Familiarity with PCIe5/6 and CXL specs, especially Electrical Compliance sections Working knowledge of key, high-speed design blocks such as PLLs, DFE, Tx EQ Experience in system testing, characterization, margin analysis, and optimization of high-speed PCIe/CXL data links over long and short channels In-depth understanding of DDR 4/5 protocols and JEDEC Standard. Hands-on experience with DDR4/5 post-silicon electrical validation. Proficiency in using high-speed lab equipment such as BERT, Oscilloscope, and VNA Strong debugging, analysis, and problem-solving skills with experience leading root cause and correction action teams. An inherent sense of urgency and accountability. Must have the ability to multi-task in a fast-paced environment.
The base salary range is $147,000 - $195,000. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities. Seniority level
Seniority level Mid-Senior level Employment type
Employment type Full-time Job function
Job function Engineering and Information Technology Industries Semiconductor Manufacturing Referrals increase your chances of interviewing at Astera Labs by 2x Sign in to set job alerts for “Power Engineer” roles.
Sunnyvale, CA $111,000.00-$164,000.00 2 weeks ago Fremont, CA $170,000.00-$240,000.00 4 days ago Mountain View, CA $40.00-$60.00 1 month ago Atherton, CA $150,000.00-$200,000.00 5 months ago Santa Clara, CA $140,000.00-$190,000.00 4 days ago Sunnyvale, CA $170,000.00-$240,000.00 2 weeks ago Hardware Engineer, Platforms, University Graduate
Sunnyvale, CA $105,000.00-$151,000.00 1 week ago Mountain View, CA $88,000.00-$165,500.00 1 year ago Newark, CA $110,000.00-$130,000.00 3 days ago San Francisco Bay Area $130,000.00-$150,000.00 3 weeks ago Mountain View, CA $150,000.00-$230,000.00 1 month ago Mountain View, CA $130,000.00-$160,000.00 1 month ago Electrical Engineer, Abuse & Test Engineering
Sunnyvale, CA $139,000.00-$200,000.00 2 weeks ago Electrical Hardware Engineer (New Grad/Early Career)
Mountain View, CA $100,000.00-$143,000.00 1 month ago Sunnyvale, CA $72,100.00-$114,700.00 1 week ago Fremont, CA $200,000.00-$210,000.00 2 weeks ago San Francisco Bay Area $120,000.00-$160,000.00 2 weeks ago We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.
#J-18808-Ljbffr