Davita Inc.
Principal Signal Integrity Engineer - Advanced Packaging
Davita Inc. - Burlington, Vermont, us, 05405
Work at Davita Inc.
Overview
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Overview
About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
The Marvell Advanced Packaging team is responsible for supporting customers with package designs that meet challenging electrical requirements. High speed signaling and challenging power delivery networks require complex and custom solutions to meet constantly advancing application needs. Many of the new designs require multi-chip and multiple component configurations with high-speed IP requirements. In addition, our team is advancing Marvell's expertise in 3D packaging, Co-packaged optics and cutting-edge substrate materials. We work with the world's leading manufacturers to solve our client's most challenging designs and integrations with industry-leading packaging techniques.
What You Can Expect As a Signal and Power Integrity Engineer in the Advanced Packaging design team, you will be responsible for the following: SI/PI analysis of designs and optimization within 2D/2.5D/3D packages Interfacing with product design teams for optimized floor-planning, package related design input and power delivery network design Perform wiring studies in order to determine optimal signal routing, power delivery verification and package size determination This job requires working on-site 5 days per week with one of Marvell's packaging design teams in either Boise, ID or Burlington, VT. What We're Looking For The ideal candidate will have an interest in semiconductor packaging design and experience working on signal and power integrity verification, and design optimization. A knowledge of Electrical Engineering concepts, circuit extractions and simulation, as well as design methodology and strategies is required. In addition, the candidate will possess a bachelor's degree in electrical engineering and 10+ years of related professional experience executing Signal Integrity simulations, package or PCB design Marvell is looking for an individual contributor with demonstrated success in the following areas: Evaluating package or PCB designs for challenging electrical requirements Close interaction with physical designers and IP teams to optimize electrical performance Executing simulation tasks for signal and power integrity optimization and sign-off Skills needed to be successful in this role: Understanding of signal integrity and power integrity concepts and fundamentals Experience with simulation and analysis using tools like HFSS, SIwave, Keysight ADS Deep knowledge of circuit extraction methodology and simulation optimization Strong communication, presentation and documentation skills The ideal candidate would have: Experience in package development, including interposer design Development experience with High Bandwidth Memory (HBM) integration Strong background in EDA simulation tools such as Ansys HFSS, Keysight ADS, Cadence Sigrity Familiarity with packaging technologies, materials, package substrate design rules and assembly rules Expected Base Pay Range (USD) 148,500 - 219,780, $ per annum
The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.
The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at
TAOps@marvell.com. #LI-MM1 #J-18808-Ljbffr
What You Can Expect As a Signal and Power Integrity Engineer in the Advanced Packaging design team, you will be responsible for the following: SI/PI analysis of designs and optimization within 2D/2.5D/3D packages Interfacing with product design teams for optimized floor-planning, package related design input and power delivery network design Perform wiring studies in order to determine optimal signal routing, power delivery verification and package size determination This job requires working on-site 5 days per week with one of Marvell's packaging design teams in either Boise, ID or Burlington, VT. What We're Looking For The ideal candidate will have an interest in semiconductor packaging design and experience working on signal and power integrity verification, and design optimization. A knowledge of Electrical Engineering concepts, circuit extractions and simulation, as well as design methodology and strategies is required. In addition, the candidate will possess a bachelor's degree in electrical engineering and 10+ years of related professional experience executing Signal Integrity simulations, package or PCB design Marvell is looking for an individual contributor with demonstrated success in the following areas: Evaluating package or PCB designs for challenging electrical requirements Close interaction with physical designers and IP teams to optimize electrical performance Executing simulation tasks for signal and power integrity optimization and sign-off Skills needed to be successful in this role: Understanding of signal integrity and power integrity concepts and fundamentals Experience with simulation and analysis using tools like HFSS, SIwave, Keysight ADS Deep knowledge of circuit extraction methodology and simulation optimization Strong communication, presentation and documentation skills The ideal candidate would have: Experience in package development, including interposer design Development experience with High Bandwidth Memory (HBM) integration Strong background in EDA simulation tools such as Ansys HFSS, Keysight ADS, Cadence Sigrity Familiarity with packaging technologies, materials, package substrate design rules and assembly rules Expected Base Pay Range (USD) 148,500 - 219,780, $ per annum
The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.
The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at
TAOps@marvell.com. #LI-MM1 #J-18808-Ljbffr