Celestial AI
Senior CAD Engineer
Celestial AI - Toronto, Ohio, United States, 43964
Work at Celestial AI
Overview
- View job
Overview
Join to apply for the
Senior CAD Engineer
role at
Celestial AI We are seeking a highly motivated CAD Engineer to develop and maintain our EDA environments, design flows, and infrastructure for cutting-edge chip development. In this role, you will bridge Analog/AMS and ASIC/Digital Verification teams, ensuring seamless integration from schematic capture to signoff. You will own PDK integration, tool automation, cluster optimization, and mixed-signal verification flows while collaborating with designers, IT, and EDA vendors to accelerate our silicon success. Essential duties include: Developing and maintaining CAD environments for Analog/AMS, ASIC, Photonics, and Systems teams; Defining, implementing, and automating design and signoff flows for custom and digital; Installing, configuring, and optimizing EDA tools (Cadence/Synopsys/Siemens) and FlexLM licenses; Integrating and validating PDKs, tech files, and IP libraries; Managing SLURM cluster infrastructure, job scheduling, and resource allocation; Writing automation scripts (Python, TCL, SKILL, Bash); Maintaining design repositories and enforcing version control best practices; Debugging SPICE, DRC/LVS, PEX, and EMIR issues; Monitoring license/cluster usage and recommending scaling strategies; Liaising with EDA vendors to resolve issues and evaluate emerging solutions. Qualifications include: BS/MS in Electrical Engineering or Computer Science; 10+ years of CAD/EDA design-automation experience supporting analog/AMS and preferably ASIC/DV teams; Hands-on expertise with Cadence Virtuoso, ADE Assembler/Explorer, Spectre, signoff experience with Pegasus, Quantus, VoltusFI or equivalent Calibre toolsets; Strong SKILL scripting and Python skills; FlexLM license server experience; IP version control knowledge; PDK integration for TSMC FinFET nodes down to N5. Preferred qualifications include experience with Virtuoso AMS Designer, Cadence Xcelium, SLURM cluster manager, digital RTL-to-GDSII flows, CI/CD pipelines for CAD-flow release and regression automation, and strong communication and mentorship skills. Location options are Santa Clara, CA or Toronto, ON, Canada. The company offers a competitive total compensation package including base salary, bonus, and equity, along with benefits such as health, vision, dental, and life insurance.
#J-18808-Ljbffr
Senior CAD Engineer
role at
Celestial AI We are seeking a highly motivated CAD Engineer to develop and maintain our EDA environments, design flows, and infrastructure for cutting-edge chip development. In this role, you will bridge Analog/AMS and ASIC/Digital Verification teams, ensuring seamless integration from schematic capture to signoff. You will own PDK integration, tool automation, cluster optimization, and mixed-signal verification flows while collaborating with designers, IT, and EDA vendors to accelerate our silicon success. Essential duties include: Developing and maintaining CAD environments for Analog/AMS, ASIC, Photonics, and Systems teams; Defining, implementing, and automating design and signoff flows for custom and digital; Installing, configuring, and optimizing EDA tools (Cadence/Synopsys/Siemens) and FlexLM licenses; Integrating and validating PDKs, tech files, and IP libraries; Managing SLURM cluster infrastructure, job scheduling, and resource allocation; Writing automation scripts (Python, TCL, SKILL, Bash); Maintaining design repositories and enforcing version control best practices; Debugging SPICE, DRC/LVS, PEX, and EMIR issues; Monitoring license/cluster usage and recommending scaling strategies; Liaising with EDA vendors to resolve issues and evaluate emerging solutions. Qualifications include: BS/MS in Electrical Engineering or Computer Science; 10+ years of CAD/EDA design-automation experience supporting analog/AMS and preferably ASIC/DV teams; Hands-on expertise with Cadence Virtuoso, ADE Assembler/Explorer, Spectre, signoff experience with Pegasus, Quantus, VoltusFI or equivalent Calibre toolsets; Strong SKILL scripting and Python skills; FlexLM license server experience; IP version control knowledge; PDK integration for TSMC FinFET nodes down to N5. Preferred qualifications include experience with Virtuoso AMS Designer, Cadence Xcelium, SLURM cluster manager, digital RTL-to-GDSII flows, CI/CD pipelines for CAD-flow release and regression automation, and strong communication and mentorship skills. Location options are Santa Clara, CA or Toronto, ON, Canada. The company offers a competitive total compensation package including base salary, bonus, and equity, along with benefits such as health, vision, dental, and life insurance.
#J-18808-Ljbffr