Apple Inc.
SerDes Senior Circuit Design Engineer
Apple Inc., Cupertino, California, United States, 95014
Cupertino, California, United States
Description
You will work on developing high-performance, high-speed AMS circuits used in SerDes PHY, including evaluating different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation, low-jitter distribution, phase interpolator, DLL, VCO, LDO). You will lead discussions with cross-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create and drive block-level specifications, mixed-signal implementations, and behavioral modeling. You will collaborate closely with SOC teams to deliver IP views and ensure they meet quality standards. Regular interactions with peers and management to communicate progress, discuss new ideas, and drive new implementations will make this a rewarding and growth-oriented environment. Minimum Qualifications
BSEE with 10+ years of proven experience. Preferred Qualifications
Deep understanding of analog mixed-signal design, especially in high-speed serial links. Experience designing analog mixed-signal circuit blocks such as Bandgap references, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, oscillators, and filters. Knowledge of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power, and low-noise techniques. Experience with digitally assisted analog design concepts (e.g., background calibrations, LMS-based adaptive loops). Proven ability to work with system and architecture teams to define block-level and IP requirements. Experience leading large teams and mentoring junior engineers. Understanding of high-speed digital circuits (e.g., serializers, deserializers, counters, dividers) and digital design principles. Knowledge of Tx/Rx equalization techniques and circuits (e.g., CTLE, DFE, de-emphasis) for 64-100+ Gbps NRZ and PAM applications. Experience with EQ adaptation methods to improve PPA. Understanding of CDR architectures and implementations. Experience in AMS circuit modeling and performance evaluation using SystemVerilog, Matlab, Python, VerilogAMS. Hands-on experience in lab testing, debugging, and data analysis. Experience with advanced CMOS technologies, including FinFET design. Experience managing AMS IC development from definition to high-volume production, including layout supervision, testing, and characterization. Additional skills that are a plus include: Knowledge of timing closure tools (e.g., Nanotime, PrimeTime). Understanding of IP delivery and quality assurance processes. Knowledge of high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY). Scripting and automation skills to improve workflow efficiency. This role offers a base salary between $181,100 and $318,400, depending on experience and qualifications. Apple also provides benefits such as stock programs, comprehensive medical and dental coverage, retirement plans, educational reimbursement, and potential bonuses or relocation assistance. Note that benefits and compensation are subject to eligibility and other terms. Apple is an equal opportunity employer committed to diversity and inclusion, seeking to promote equal opportunity without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other protected characteristics.
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You will work on developing high-performance, high-speed AMS circuits used in SerDes PHY, including evaluating different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation, low-jitter distribution, phase interpolator, DLL, VCO, LDO). You will lead discussions with cross-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create and drive block-level specifications, mixed-signal implementations, and behavioral modeling. You will collaborate closely with SOC teams to deliver IP views and ensure they meet quality standards. Regular interactions with peers and management to communicate progress, discuss new ideas, and drive new implementations will make this a rewarding and growth-oriented environment. Minimum Qualifications
BSEE with 10+ years of proven experience. Preferred Qualifications
Deep understanding of analog mixed-signal design, especially in high-speed serial links. Experience designing analog mixed-signal circuit blocks such as Bandgap references, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, oscillators, and filters. Knowledge of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power, and low-noise techniques. Experience with digitally assisted analog design concepts (e.g., background calibrations, LMS-based adaptive loops). Proven ability to work with system and architecture teams to define block-level and IP requirements. Experience leading large teams and mentoring junior engineers. Understanding of high-speed digital circuits (e.g., serializers, deserializers, counters, dividers) and digital design principles. Knowledge of Tx/Rx equalization techniques and circuits (e.g., CTLE, DFE, de-emphasis) for 64-100+ Gbps NRZ and PAM applications. Experience with EQ adaptation methods to improve PPA. Understanding of CDR architectures and implementations. Experience in AMS circuit modeling and performance evaluation using SystemVerilog, Matlab, Python, VerilogAMS. Hands-on experience in lab testing, debugging, and data analysis. Experience with advanced CMOS technologies, including FinFET design. Experience managing AMS IC development from definition to high-volume production, including layout supervision, testing, and characterization. Additional skills that are a plus include: Knowledge of timing closure tools (e.g., Nanotime, PrimeTime). Understanding of IP delivery and quality assurance processes. Knowledge of high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY). Scripting and automation skills to improve workflow efficiency. This role offers a base salary between $181,100 and $318,400, depending on experience and qualifications. Apple also provides benefits such as stock programs, comprehensive medical and dental coverage, retirement plans, educational reimbursement, and potential bonuses or relocation assistance. Note that benefits and compensation are subject to eligibility and other terms. Apple is an equal opportunity employer committed to diversity and inclusion, seeking to promote equal opportunity without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other protected characteristics.
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