Apple Inc.
Cupertino, California, United States
Description
You will work on developing high-performance, high-speed AMS circuits used in SerDes PHY, including evaluating different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation, low-jitter distribution, phase interpolator, DLL, VCO, LDO). You will lead discussions with cross-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create and drive block-level specifications, mixed-signal implementations, and behavioral modeling. You will collaborate closely with SOC teams to deliver IP views and ensure they meet quality standards. Regular interactions with peers and management to communicate progress, discuss new ideas, and drive new implementations will be part of your role, making this a rewarding and growth-oriented environment. Minimum Qualifications
BSEE with 20+ years of proven experience. Preferred Qualifications
Deep understanding of analog mixed-signal design with experience in high-speed serial links. Experience designing analog mixed-signal circuit blocks such as Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, oscillators, filters. Knowledge of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power, and low-noise techniques. Experience with digitally assisted analog design concepts (e.g., background calibrations, LMS-based adaptive loops). Proven ability to work with system and architecture teams to define block-level and IP requirements. Experience leading large teams and mentoring junior engineers. Knowledge of high-speed digital circuits (e.g., serializer, deserializer, counters, dividers) and digital design concepts. Experience with Tx/Rx equalization techniques for 64-100+ Gbps applications, including CTLE, DFE, de-emphasis. Understanding of EQ adaptation methods and circuit interactions to improve PPA. Familiarity with CDR architectures and implementations. Experience in AMS circuit modeling and performance evaluation using SystemVerilog, Matlab, Python, VerilogAMS. Hands-on experience with lab testing, debugging, and data analysis. Experience with advanced CMOS technologies, including FinFET design. Experience in AMS IC development from definition to high-volume production, including layout supervision, evaluation, and characterization. Additional skills in timing closure tools (e.g., Nanotime, PrimeTime), IP delivery, and quality checks are a plus. Knowledge of high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is desirable. Scripting and automation skills are highly desirable. At Apple, base pay ranges from $257,400 to $386,300, depending on skills, qualifications, experience, and location. Employees may also participate in stock programs, bonuses, and benefits such as medical coverage, retirement plans, discounts, and educational reimbursement. This role may be eligible for additional bonuses or relocation assistance. Apple is an equal opportunity employer committed to diversity and inclusion, promoting equal opportunity regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other protected characteristics.
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You will work on developing high-performance, high-speed AMS circuits used in SerDes PHY, including evaluating different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation, low-jitter distribution, phase interpolator, DLL, VCO, LDO). You will lead discussions with cross-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create and drive block-level specifications, mixed-signal implementations, and behavioral modeling. You will collaborate closely with SOC teams to deliver IP views and ensure they meet quality standards. Regular interactions with peers and management to communicate progress, discuss new ideas, and drive new implementations will be part of your role, making this a rewarding and growth-oriented environment. Minimum Qualifications
BSEE with 20+ years of proven experience. Preferred Qualifications
Deep understanding of analog mixed-signal design with experience in high-speed serial links. Experience designing analog mixed-signal circuit blocks such as Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, oscillators, filters. Knowledge of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power, and low-noise techniques. Experience with digitally assisted analog design concepts (e.g., background calibrations, LMS-based adaptive loops). Proven ability to work with system and architecture teams to define block-level and IP requirements. Experience leading large teams and mentoring junior engineers. Knowledge of high-speed digital circuits (e.g., serializer, deserializer, counters, dividers) and digital design concepts. Experience with Tx/Rx equalization techniques for 64-100+ Gbps applications, including CTLE, DFE, de-emphasis. Understanding of EQ adaptation methods and circuit interactions to improve PPA. Familiarity with CDR architectures and implementations. Experience in AMS circuit modeling and performance evaluation using SystemVerilog, Matlab, Python, VerilogAMS. Hands-on experience with lab testing, debugging, and data analysis. Experience with advanced CMOS technologies, including FinFET design. Experience in AMS IC development from definition to high-volume production, including layout supervision, evaluation, and characterization. Additional skills in timing closure tools (e.g., Nanotime, PrimeTime), IP delivery, and quality checks are a plus. Knowledge of high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is desirable. Scripting and automation skills are highly desirable. At Apple, base pay ranges from $257,400 to $386,300, depending on skills, qualifications, experience, and location. Employees may also participate in stock programs, bonuses, and benefits such as medical coverage, retirement plans, discounts, and educational reimbursement. This role may be eligible for additional bonuses or relocation assistance. Apple is an equal opportunity employer committed to diversity and inclusion, promoting equal opportunity regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other protected characteristics.
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