Qualcomm
Implementation Timing / STA Design Engineer
Qualcomm, San Diego, California, United States, 92189
Overview
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Implementation Timing / STA Design Engineer
role at Qualcomm. Qualcomm’s SoC Implementation Team is looking for skilled engineers to focus on timing constraints development, power analysis, STA, and timing closure for premium-tier chips. This is an excellent opportunity to join the Snapdragon implementation team, responsible for SoCs in sub-3nm nodes across mobile, AI, and automotive sectors. Candidates should have at least 2 years of experience and be proficient with tools such as Primetime, Fishtail/TCM. Scripting skills in Tcl, Perl, or Python are also desirable. Responsibilities
Develop constraints for physical power-aware synthesis, setup for various modes/corners and low-power multi-voltage domain crossings, and signoff with static timing analysis. Collaborate closely with RTL design and physical design teams to identify timing requirements and bottlenecks. Generate/review, and validate clock domain crossing and design constraints to achieve timing closure of complex SoC cores. Review and integrate HM constraints into SoC and ensure correlation between HM and SoC timing. Analyze timing across modes and corners, understand concepts like path pessimism and margins. Minimum Qualifications
Bachelor\'s degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Master\'s degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process. You may email disability-accommodations@qualcomm.com or call Qualcomm\'s toll-free number. Qualcomm will provide reasonable accommodations to support individuals with disabilities to participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected classification. Pay Range And Other Compensation & Benefits
$140,000.00 - $210,000.00 The pay range reflects the broad minimum to maximum for the posted location. Salary is only one component of total compensation at Qualcomm. We offer a competitive annual discretionary bonus program and potential RSU grants, along with a comprehensive benefits package. Your recruiter can discuss details about Qualcomm\'s benefits.
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Join to apply for the
Implementation Timing / STA Design Engineer
role at Qualcomm. Qualcomm’s SoC Implementation Team is looking for skilled engineers to focus on timing constraints development, power analysis, STA, and timing closure for premium-tier chips. This is an excellent opportunity to join the Snapdragon implementation team, responsible for SoCs in sub-3nm nodes across mobile, AI, and automotive sectors. Candidates should have at least 2 years of experience and be proficient with tools such as Primetime, Fishtail/TCM. Scripting skills in Tcl, Perl, or Python are also desirable. Responsibilities
Develop constraints for physical power-aware synthesis, setup for various modes/corners and low-power multi-voltage domain crossings, and signoff with static timing analysis. Collaborate closely with RTL design and physical design teams to identify timing requirements and bottlenecks. Generate/review, and validate clock domain crossing and design constraints to achieve timing closure of complex SoC cores. Review and integrate HM constraints into SoC and ensure correlation between HM and SoC timing. Analyze timing across modes and corners, understand concepts like path pessimism and margins. Minimum Qualifications
Bachelor\'s degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Master\'s degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process. You may email disability-accommodations@qualcomm.com or call Qualcomm\'s toll-free number. Qualcomm will provide reasonable accommodations to support individuals with disabilities to participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected classification. Pay Range And Other Compensation & Benefits
$140,000.00 - $210,000.00 The pay range reflects the broad minimum to maximum for the posted location. Salary is only one component of total compensation at Qualcomm. We offer a competitive annual discretionary bonus program and potential RSU grants, along with a comprehensive benefits package. Your recruiter can discuss details about Qualcomm\'s benefits.
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