TekWissen LLC
ASIC / RTL Design Engineer - Senior
TekWissen LLC, San Jose, California, United States, 95199
Overview
TekWissen is a global workforce management provider headquartered in Ann Arbor, Michigan that offers strategic talent solutions to our clients world-wide. This Client is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. global company that specializes in manufacturing semiconductor devices used in computer processing. The company also produces flash memories, graphics processors, motherboard chip sets, and a variety of components used in consumer electronics goods.
Job Title ASIC / RTL Design Engineer - Senior
Work Location San Jose, CA, 95124
Duration 6 Months
Work Type Temporary Assignment
Job Type Onsite
Job Description The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and Client internal IPs.
Successful candidates will be responsible for leading, and participating in, the design of leading edge SoCs in advanced digital CMOS processes.
Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micro-architectural specifications, Conversion of micro-architectural specifications to logic implementation, Verification, emulation, debug, synthesis, and timing closure, Interfacing with physical execution, software, and silicon bring-up teams.
Experience and Education SoC Design
Knowledge AND hand-on experience from industry ASIC design flow including RTL coding, IP Integration, debugging / verification, and supporting synthesis and timing closure.
Experience with front end quality checks such as Lint, CDC, RDC. Running, Debugging, Reporting, Driving Cleanup.
Working knowledge of ARM cores and other I / O standard interfaces.
Roughly 10 years experience, but less is acceptable.
Bachelors in electrical engineering or computer engineering is preferred
An ideal candidate would also exhibit : Strong communication and documentation skills, Good organizational, time management and multitasking skills, Strong initiative and discipline to follow-through, Technical leadership
Top skills
RTL coding
TCL coding
Python coding
Understanding of different CAD tools (synthesis, lint, CDC, RDC, PrimeTime)
TekWissen Group is an equal opportunity employer supporting workforce diversity.
#J-18808-Ljbffr
Job Title ASIC / RTL Design Engineer - Senior
Work Location San Jose, CA, 95124
Duration 6 Months
Work Type Temporary Assignment
Job Type Onsite
Job Description The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and Client internal IPs.
Successful candidates will be responsible for leading, and participating in, the design of leading edge SoCs in advanced digital CMOS processes.
Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micro-architectural specifications, Conversion of micro-architectural specifications to logic implementation, Verification, emulation, debug, synthesis, and timing closure, Interfacing with physical execution, software, and silicon bring-up teams.
Experience and Education SoC Design
Knowledge AND hand-on experience from industry ASIC design flow including RTL coding, IP Integration, debugging / verification, and supporting synthesis and timing closure.
Experience with front end quality checks such as Lint, CDC, RDC. Running, Debugging, Reporting, Driving Cleanup.
Working knowledge of ARM cores and other I / O standard interfaces.
Roughly 10 years experience, but less is acceptable.
Bachelors in electrical engineering or computer engineering is preferred
An ideal candidate would also exhibit : Strong communication and documentation skills, Good organizational, time management and multitasking skills, Strong initiative and discipline to follow-through, Technical leadership
Top skills
RTL coding
TCL coding
Python coding
Understanding of different CAD tools (synthesis, lint, CDC, RDC, PrimeTime)
TekWissen Group is an equal opportunity employer supporting workforce diversity.
#J-18808-Ljbffr