Intel
Job Details:
Job Description:
We are seeking a highly experienced Lead Engineer to conceptualize, document, and design
Tools, Flows, and Methods (TFM)
that enhance logic/RTL design for IPs and SoCs. This role focuses on improving design efficiency, quality, and integration across architectures and process nodes. You will work closely with logic design teams to define and implement methodologies that drive improvements in power, performance, and area (PPA), while enabling fast convergence and seamless integration.
Key Responsibilities
Design and develop TFM solutions for logic/RTL design and IP/SoC integration.
Define and implement methodologies that optimize PPA on advanced architectures and process nodes.
Analyze retrospective data to identify gaps and propose incremental or transformative improvements.
Collaborate with logic design teams to enhance RTL design flows and convergence strategies.
Develop automation and infrastructure to support RTL development, simulation, and physical design.
Qualifications:
Required Qualifications
BS/MS in Computer Science, Electrical Engineering, or related field with 10+ years of experience.
8+ years of experience in semiconductor design in areas such as RTL simulation, design verification and/or synthesis.
Proficiency in Python for software development.
Familiarity with EDA data formats such as
Liberty
,
SDC
,
SDF
,
VCD/FSDB
.
Experience working with
Git
in large collaborative development environments.
Familiarity with industry-standard
EDA tools
and front-end design flows (RTL, simulation, verification, linting, synthesis).
Excellent debugging and problem-solving skills with a focus on software robustness and maintainability.
Preferred Qualifications
Advanced proficiency in
Python
, with strong object-oriented design skills.
Knowledge of build systems (e.g.,
Make, CMake, Gradle
) and dependency management.
Experience with
cloud-based
or
hybrid on-prem/cloud
development environments.
Proficiency in
Docker
and
Kubernetes
for containerized EDA workflows.
Ability to thrive in a fast-paced, collaborative environment.
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, California, Santa Clara
Additional Locations:
Business group:
As a member of the Chief Technology Office, Artificial Intelligence, and Network and Edge Group (CTO AI NEX), you will be committed to strategically penetrating the AI market by delivering disruptive and transformative solutions. Your focus will be on leveraging technology innovation and incubation to drive commercial success, ensuring that advancements create significant value. The team is dedicated to driving the software-defined transformation of the world's networks profitably, setting new standards for efficiency and connectivity. Through these priorities, you aim to lead the way in technological evolution and redefine the future of global networks.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.
Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003
$204,500.00-$288,710.00
S
al
ary
range
dependent on a number of factors including location and experience.
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
Annual Salary Range for jobs which could be performed in the US:
$186,070.00-303,140.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Job Description:
We are seeking a highly experienced Lead Engineer to conceptualize, document, and design
Tools, Flows, and Methods (TFM)
that enhance logic/RTL design for IPs and SoCs. This role focuses on improving design efficiency, quality, and integration across architectures and process nodes. You will work closely with logic design teams to define and implement methodologies that drive improvements in power, performance, and area (PPA), while enabling fast convergence and seamless integration.
Key Responsibilities
Design and develop TFM solutions for logic/RTL design and IP/SoC integration.
Define and implement methodologies that optimize PPA on advanced architectures and process nodes.
Analyze retrospective data to identify gaps and propose incremental or transformative improvements.
Collaborate with logic design teams to enhance RTL design flows and convergence strategies.
Develop automation and infrastructure to support RTL development, simulation, and physical design.
Qualifications:
Required Qualifications
BS/MS in Computer Science, Electrical Engineering, or related field with 10+ years of experience.
8+ years of experience in semiconductor design in areas such as RTL simulation, design verification and/or synthesis.
Proficiency in Python for software development.
Familiarity with EDA data formats such as
Liberty
,
SDC
,
SDF
,
VCD/FSDB
.
Experience working with
Git
in large collaborative development environments.
Familiarity with industry-standard
EDA tools
and front-end design flows (RTL, simulation, verification, linting, synthesis).
Excellent debugging and problem-solving skills with a focus on software robustness and maintainability.
Preferred Qualifications
Advanced proficiency in
Python
, with strong object-oriented design skills.
Knowledge of build systems (e.g.,
Make, CMake, Gradle
) and dependency management.
Experience with
cloud-based
or
hybrid on-prem/cloud
development environments.
Proficiency in
Docker
and
Kubernetes
for containerized EDA workflows.
Ability to thrive in a fast-paced, collaborative environment.
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, California, Santa Clara
Additional Locations:
Business group:
As a member of the Chief Technology Office, Artificial Intelligence, and Network and Edge Group (CTO AI NEX), you will be committed to strategically penetrating the AI market by delivering disruptive and transformative solutions. Your focus will be on leveraging technology innovation and incubation to drive commercial success, ensuring that advancements create significant value. The team is dedicated to driving the software-defined transformation of the world's networks profitably, setting new standards for efficiency and connectivity. Through these priorities, you aim to lead the way in technological evolution and redefine the future of global networks.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.
Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003
$204,500.00-$288,710.00
S
al
ary
range
dependent on a number of factors including location and experience.
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
Annual Salary Range for jobs which could be performed in the US:
$186,070.00-303,140.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.