CesiumAstro
Overview
Senior FPGA Engineer II – Network at CesiumAstro. CesiumAstro develops out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We are a dynamic, cross-functional team that values hands-on, interactive, and autonomous work. If you are passionate about developing leading-edge hardware for satellites, spacecraft, and aerospace systems, we would like to hear from you.
Responsibilities
Design, verify, test, and deploy FPGA designs and systems through all phases of the development process.
Develop FPGA HDL designs including high-speed serial interfaces, data streams, digital processing cores, multiple clocks and clock domains, and management interfaces.
Perform testing, validation, and verification for FPGA designs. Experience in board-level hardware design is desirable.
Present engineering design review materials to customers and the executive team; participate in proposal-writing efforts.
Communicate clearly in written and verbal form.
Qualifications
BS or MS in Electrical Engineering or Computer Engineering from an accredited university.
Minimum of 6 years of industry or university research experience in the design, analysis, and implementation of FPGA systems.
Production experience in design, implementation, and integration of OSI Layers 2 and 3 networking systems, including Ethernet, IP, and MPLS.
Experience in networking system design, especially determining throughput and memory requirements.
Expertise in writing and reviewing VHDL.
Proficiency in writing and reviewing SystemVerilog for block and system verification.
Expertise in FPGA design and verification tools for modern complex FPGA and SoC platforms such as Xilinx Vivado and Siemens Questa.
Excellent written and verbal communication skills.
Preferred Experience
Deep understanding of network design and deriving requirements based on high-level objectives.
Familiarity with non-FPGA networking platforms including ASICs and general-purpose processors.
Aerospace design and qualification.
Worst-case analysis, failure methods and criticality analyses, and reliability analysis.
Experience with board-level hardware design.
Familiarity with communications systems, such as digital signal processing.
Experience writing low-level software for interfacing to FPGA IP.
Compensation $102,000 - $126,000 a year
CesiumAstro considers several factors when extending an offer, including the role and associated responsibilities, a candidate’s work experience, education/training, and key skills. Full-time employment offers include company stock options and a generous benefits package including health, dental, vision, HSA, FSA, life, disability and retirement plans.
Equal Opportunity CesiumAstro is an Equal Opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, protected Veteran Status, or any other characteristic protected by applicable federal, state, or local law.
Note: CesiumAstro does not accept unsolicited resumes from contract agencies or search firms. Any unsolicited resumes submitted to our website or to CesiumAstro team members not through our approved vendor list or Talent Acquisition will be considered property of CesiumAstro, and we will not be obligated to pay any referral fees.
Seniority level
Associate
Employment type
Full-time
Job function
Engineering and Information Technology
Industries
Defense and Space Manufacturing
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Responsibilities
Design, verify, test, and deploy FPGA designs and systems through all phases of the development process.
Develop FPGA HDL designs including high-speed serial interfaces, data streams, digital processing cores, multiple clocks and clock domains, and management interfaces.
Perform testing, validation, and verification for FPGA designs. Experience in board-level hardware design is desirable.
Present engineering design review materials to customers and the executive team; participate in proposal-writing efforts.
Communicate clearly in written and verbal form.
Qualifications
BS or MS in Electrical Engineering or Computer Engineering from an accredited university.
Minimum of 6 years of industry or university research experience in the design, analysis, and implementation of FPGA systems.
Production experience in design, implementation, and integration of OSI Layers 2 and 3 networking systems, including Ethernet, IP, and MPLS.
Experience in networking system design, especially determining throughput and memory requirements.
Expertise in writing and reviewing VHDL.
Proficiency in writing and reviewing SystemVerilog for block and system verification.
Expertise in FPGA design and verification tools for modern complex FPGA and SoC platforms such as Xilinx Vivado and Siemens Questa.
Excellent written and verbal communication skills.
Preferred Experience
Deep understanding of network design and deriving requirements based on high-level objectives.
Familiarity with non-FPGA networking platforms including ASICs and general-purpose processors.
Aerospace design and qualification.
Worst-case analysis, failure methods and criticality analyses, and reliability analysis.
Experience with board-level hardware design.
Familiarity with communications systems, such as digital signal processing.
Experience writing low-level software for interfacing to FPGA IP.
Compensation $102,000 - $126,000 a year
CesiumAstro considers several factors when extending an offer, including the role and associated responsibilities, a candidate’s work experience, education/training, and key skills. Full-time employment offers include company stock options and a generous benefits package including health, dental, vision, HSA, FSA, life, disability and retirement plans.
Equal Opportunity CesiumAstro is an Equal Opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, protected Veteran Status, or any other characteristic protected by applicable federal, state, or local law.
Note: CesiumAstro does not accept unsolicited resumes from contract agencies or search firms. Any unsolicited resumes submitted to our website or to CesiumAstro team members not through our approved vendor list or Talent Acquisition will be considered property of CesiumAstro, and we will not be obligated to pay any referral fees.
Seniority level
Associate
Employment type
Full-time
Job function
Engineering and Information Technology
Industries
Defense and Space Manufacturing
#J-18808-Ljbffr