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Intel Corporation

FVCTO - Formal Verification Architect

Intel Corporation, Folsom, California, United States, 95630

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FVCTO - Formal Verification Architect

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Intel Corporation .

Intel puts silicon at the heart of the world’s most advanced technologies. Every day we create world‑changing solutions that enrich the lives of people everywhere. If you have a big idea, let’s do something wonderful together and build a better tomorrow.

Job Details Job Description:

Who You Are

Verify microarchitecture using industry‑standard formal verification tools and technologies based on the latest model checking and equivalence checking algorithms on world‑class design IPs and SOCs for server, client, and graphics.

Leverage hardware architecture design and RTL implementation details.

Define the formal verification scope; deploy the right strategy to prove correctness while deploying advanced formal techniques and create abstraction models for convergence on the design.

Carve out the right boundaries for the design, create comprehensive formal verification test plans, track, verify, apply abstraction techniques, and converge on complex designs to deliver a high‑quality design on schedule and articulate the ROI.

Analyze new methodologies, evaluate new tools, and corroborate results.

Work with vendors to resolve hard design and tool problems.

Qualifications

Problem‑solving and debugging skills.

Willingness to work closely with various design teams and cross‑site teams.

Verbal and written communication skills.

Motivated, self‑directed and able to work effectively both independently and in a team environment.

Minimum Qualifications

Bachelor’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 9 years of relevant experience OR Master’s Degree with 6 years of relevant experience OR PhD with 4 years of relevant experience.

Experience

RTL languages like SystemVerilog or VHDL; assertion languages like SVA, formal verification.

Preferred Qualifications

Fundamentals of formal verification technology, including model checking and writing formal assertions to express architectural intent of designs.

Formal verification principles and methods.

Computer architecture, digital design, and verification methods.

Research in the formal verification domain.

Job Type Experienced Hire

Shift Shift 1 (United States of America)

Locations Primary location: US, California, Santa Clara. Additional locations: US, California, Folsom; US, Oregon, Hillsboro; US, Texas, Austin.

Business Group The Silicon Engineering Group (SIG) focuses on the development and integration of SOCs, cores, and critical IPs to power Intel’s leading products.

Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust N/A

Benefits We offer a total compensation package that ranks among the best in the industry. It includes competitive pay, stock, bonuses, and benefit programs such as health, retirement, and vacation. Find more information about all of our benefits here: https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003

Annual Salary Range (US) $186,070.00–$303,140.00 USD

Work Model This role will require an on‑site presence. Job posting details such as work model, location or time type are subject to change.

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