Jobs via Dice
High-Speed Analog Engineer (34434)
Jobs via Dice, Sunnyvale, California, United States, 94087
Job Overview
Myticas LLC is seeking a High‑Speed Analog EDA/CAD Engineer to support SiGe and CMOS research & development and chip design. The role focuses on all phases of the tool flow, including foundry interface, PDK installation and support, tool evaluation, layout, archive, and tapeout. The engineer will be hands‑on with EDA environments and will provide significant tool and PDK customization and design team support.
Responsibilities
Install, customize, and support external vendor PDKs for both SiGe and CMOS processes.
Install, customize, and support a custom IC and RF CAD environment for high‑speed (10‑40 Gb/s), broadband, mixed‑signal, integrated circuits used in fiber‑based wireline applications.
Lead and contribute to the development of design standards, IC development processes, CAD tools, and design flows.
Execute and support layout efforts, including archive and tapeout processes.
Qualifications / Requirements
Expertise in high‑speed analog and mixed‑signal IC design concepts and strong critical‑thinking, problem‑solving, and engineering judgment.
Proficiency in analog EDA front‑ and back‑end tools: Cadence Virtuoso, ADE, Mentor Calibre, and CADENCE Spectre.
Strong programming skills (e.g., Skill language, Verilog, C/C++).
Experience with PDK configuration, documentation, and maintenance.
FlexLM license management and strong UNIX/Linux knowledge.
Preferred: Perforce, Oracle scripting, advanced modelling and simulation, Linux OS support.
Minimum Experience
5 + years of experience as a high‑speed analog & mixed‑signal IC CAD professional.
Hands‑on experience with CMOS and bipolar technologies.
Experience with transistor‑level IC design and verification software (e.g., Cadence Composer, Virtuoso AMS).
General understanding of digital physical design flows (RTL coding, place & route, DRC/LVS verification).
Education
BS in Electrical Engineering or related field (5 + years practice) or equivalent experience.
MS (4 + years) or PhD (3 + years) preferred.
Job Details
Seniority level: Mid‑Senior
Employment type: Full‑time
Job function: Engineering and Information Technology
Industry: Software Development
Compensation $70‑$100 /hr on W2 (based upon experience).
#J-18808-Ljbffr
Responsibilities
Install, customize, and support external vendor PDKs for both SiGe and CMOS processes.
Install, customize, and support a custom IC and RF CAD environment for high‑speed (10‑40 Gb/s), broadband, mixed‑signal, integrated circuits used in fiber‑based wireline applications.
Lead and contribute to the development of design standards, IC development processes, CAD tools, and design flows.
Execute and support layout efforts, including archive and tapeout processes.
Qualifications / Requirements
Expertise in high‑speed analog and mixed‑signal IC design concepts and strong critical‑thinking, problem‑solving, and engineering judgment.
Proficiency in analog EDA front‑ and back‑end tools: Cadence Virtuoso, ADE, Mentor Calibre, and CADENCE Spectre.
Strong programming skills (e.g., Skill language, Verilog, C/C++).
Experience with PDK configuration, documentation, and maintenance.
FlexLM license management and strong UNIX/Linux knowledge.
Preferred: Perforce, Oracle scripting, advanced modelling and simulation, Linux OS support.
Minimum Experience
5 + years of experience as a high‑speed analog & mixed‑signal IC CAD professional.
Hands‑on experience with CMOS and bipolar technologies.
Experience with transistor‑level IC design and verification software (e.g., Cadence Composer, Virtuoso AMS).
General understanding of digital physical design flows (RTL coding, place & route, DRC/LVS verification).
Education
BS in Electrical Engineering or related field (5 + years practice) or equivalent experience.
MS (4 + years) or PhD (3 + years) preferred.
Job Details
Seniority level: Mid‑Senior
Employment type: Full‑time
Job function: Engineering and Information Technology
Industry: Software Development
Compensation $70‑$100 /hr on W2 (based upon experience).
#J-18808-Ljbffr