Microsoft
Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission.
Senior Design Engineer – AI System on Chip (AISoC) Silicon Team The candidate must be a highly motivated self‑starter who will thrive in this cutting‑edge technical environment.
Responsibilities
Drive high‑performance, high‑bandwidth compute and Network‑on‑Chip designs in state‑of‑the‑art AI SoCs.
Work on IP microarchitecture specification, Register Transfer Level (RTL) design, synthesis/lint/CDC/FEV and System on Chip (SoC) integration on different subsystems.
Interact with architecture, verification, and physical design teams to ensure designs are implemented and verified to specification.
Qualifications
Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience
OR Master’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience
OR Bachelor’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience
OR equivalent experience.
5+ years expertise in Digital Design including microarchitecture specification development, RTL coding in Verilog/SystemVerilog and Clock Domain Crossing (CDC)/Lint closure.
5+ years of experience delivering successful IP or Application Specific Integrated Circuits (ASIC)/SoC designs.
4+ years of experience in synthesis, timing constraints, power, performance, area (PPA) trade‑offs and post‑silicon debug.
4+ years of experience designing Fabric/Network‑on‑Chip or networking ASICs or complex control logic.
Other Requirements Ability to meet Microsoft, customer, and/or government security screening requirements. These include Microsoft Cloud Background Check, export control compliance, and verification of citizenship or residency as required.
Additional or Preferred Qualifications
CPU or graphics core design.
Complex algorithmic designs for AI usages.
Script development.
Compensation and Benefits The typical base pay range for this role across the U.S. is USD $119,800 – $234,700 per year. In the San Francisco Bay Area and New York City metropolitan area, the base pay range is USD $158,400 – $258,000 per year. Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here.
Microsoft will accept applications for the role until Nov 6 2025.
Microsoft is an equal opportunity employer. Consistent with applicable law, all qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.
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Senior Design Engineer – AI System on Chip (AISoC) Silicon Team The candidate must be a highly motivated self‑starter who will thrive in this cutting‑edge technical environment.
Responsibilities
Drive high‑performance, high‑bandwidth compute and Network‑on‑Chip designs in state‑of‑the‑art AI SoCs.
Work on IP microarchitecture specification, Register Transfer Level (RTL) design, synthesis/lint/CDC/FEV and System on Chip (SoC) integration on different subsystems.
Interact with architecture, verification, and physical design teams to ensure designs are implemented and verified to specification.
Qualifications
Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience
OR Master’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience
OR Bachelor’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience
OR equivalent experience.
5+ years expertise in Digital Design including microarchitecture specification development, RTL coding in Verilog/SystemVerilog and Clock Domain Crossing (CDC)/Lint closure.
5+ years of experience delivering successful IP or Application Specific Integrated Circuits (ASIC)/SoC designs.
4+ years of experience in synthesis, timing constraints, power, performance, area (PPA) trade‑offs and post‑silicon debug.
4+ years of experience designing Fabric/Network‑on‑Chip or networking ASICs or complex control logic.
Other Requirements Ability to meet Microsoft, customer, and/or government security screening requirements. These include Microsoft Cloud Background Check, export control compliance, and verification of citizenship or residency as required.
Additional or Preferred Qualifications
CPU or graphics core design.
Complex algorithmic designs for AI usages.
Script development.
Compensation and Benefits The typical base pay range for this role across the U.S. is USD $119,800 – $234,700 per year. In the San Francisco Bay Area and New York City metropolitan area, the base pay range is USD $158,400 – $258,000 per year. Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here.
Microsoft will accept applications for the role until Nov 6 2025.
Microsoft is an equal opportunity employer. Consistent with applicable law, all qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.
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