Tessolve
Signal & Power Integrity (SI/PI) Engineer
Tessolve, San Jose, California, United States, 95199
Signal & Power Integrity (SI/PI) Engineer
Location: San Jose, California, United States Experience: 5+ years Visa: Requires H1B (mandatory) Joining a global semiconductor solutions leader, you will work on cutting‑edge packaging design projects across advanced technologies, collaborate with world‑class engineering teams, and help shape the future of semiconductor innovation. What You’ll Do
Perform channel modeling, extractions, and eye analysis for high‑speed interfaces. Conduct pre‑ and post‑layout simulations to ensure compliance with standards. Analyze crosstalk, reflections, jitter, and insertion/return loss. Collaborate with design, package, and PCB teams to optimize SI performance. Deliver reports and recommendations to guide design decisions. What We’re Looking For
Strong background in signal integrity for high‑speed serial and memory interfaces. Hands‑on experience with HFSS or Clarity, Siwave or PowerSI, SystemSI or ADS or AEDT. Familiarity with JEDEC/LPDDR5/6 and PCIe/UCIe standards. Excellent problem‑solving skills and ability to work cross‑functionally. H1B Visa (mandatory). Benefits
Join a global semiconductor solutions leader, where you’ll work on cutting‑edge packaging design projects across advanced technologies, collaborate with world‑class engineering teams, and help shape the future of semiconductor innovation. Equal Opportunity Employer
Tessolve is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, age, disability, veteran status, or any other protected characteristic.
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Location: San Jose, California, United States Experience: 5+ years Visa: Requires H1B (mandatory) Joining a global semiconductor solutions leader, you will work on cutting‑edge packaging design projects across advanced technologies, collaborate with world‑class engineering teams, and help shape the future of semiconductor innovation. What You’ll Do
Perform channel modeling, extractions, and eye analysis for high‑speed interfaces. Conduct pre‑ and post‑layout simulations to ensure compliance with standards. Analyze crosstalk, reflections, jitter, and insertion/return loss. Collaborate with design, package, and PCB teams to optimize SI performance. Deliver reports and recommendations to guide design decisions. What We’re Looking For
Strong background in signal integrity for high‑speed serial and memory interfaces. Hands‑on experience with HFSS or Clarity, Siwave or PowerSI, SystemSI or ADS or AEDT. Familiarity with JEDEC/LPDDR5/6 and PCIe/UCIe standards. Excellent problem‑solving skills and ability to work cross‑functionally. H1B Visa (mandatory). Benefits
Join a global semiconductor solutions leader, where you’ll work on cutting‑edge packaging design projects across advanced technologies, collaborate with world‑class engineering teams, and help shape the future of semiconductor innovation. Equal Opportunity Employer
Tessolve is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, national origin, age, disability, veteran status, or any other protected characteristic.
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