Senior Analog/Mixed-Signal Layout Engineer – 7nm FinFET

A leading staffing agency is looking for a skilled engineer to participate in the layout and development of high-speed analog and mixed-signal integrated circuits. The ideal candidate will have 4-6 years of experience and proficiency in deep sub-micron FinFET technologies. Collaboration with cross-functional teams and expertise in Cadence and Mentor graphics tools are essential for this role. This position is located in Palo Alto, California. #J-18808-Ljbffr