Senior ASIC Verification Engineer—UVM/SystemVerilog, Equity

A leading semiconductor company in San Jose, CA, seeks a qualified ASIC Product Engineer to join a high-performance design team. Responsibilities include developing verification environments and debugging. Requirements include extensive experience in ASIC verification, knowledge of System Verilog, and strong communication skills. This role offers a competitive salary ranging from $141,300 to $226,000 along with comprehensive benefits packages. #J-18808-Ljbffr