Senior Analog SerDes Architect for High-Speed Optical Links

A leading semiconductor company seeks a Lead Analog SerDes Architect/Design Engineer to shape the future of data center connectivity in Santa Clara, CA. The ideal candidate will have a strong background in high-speed serial link design, with hands-on experience in analog CMOS/BiCMOS technologies. Responsibilities include defining circuit architectures, guiding junior designers, and collaborating on integrated circuit components. Join this innovative team to drive next-generation bandwidth growth and influence advanced photonic developments. #J-18808-Ljbffr