Senior SerDes Layout Engineer – High-Speed Analog (Flexible)

A leading semiconductor company in San Jose is seeking a Senior High-Speed Mixed-Signal Layout/Analog Engineer. In this role, you will collaborate with circuit designers, optimize performance for SERDES analog PHY, and utilize tools like Virtuoso and Calibre. Ideal candidates have a Bachelor's with extensive experience in RF/analog design. The position offers a competitive salary ranging from $180,950 to $289,050 USD and comprehensive benefits including medical, dental, and flexible work options. #J-18808-Ljbffr