ASIC RTL Designer: NoC & Memory Systems for AI Accelerators

A leading automotive company is seeking an ASIC RTL Design Engineer to work on next-generation AI accelerators. The role focuses on high-performance interconnect and memory systems, requiring expertise in Verilog/SystemVerilog and NoC design. Candidates should have a degree in Electrical Engineering or Computer Science and strong problem-solving skills. Compensation ranges from $104,000 to $264,000 annually, along with extensive benefits including healthcare and 401(k) matching. #J-18808-Ljbffr