Remote Senior Verification Engineer - UVM/SystemVerilog

An established industry player seeks a Senior Design Verification Engineer to work remotely. In this pivotal role, you'll develop and execute verification plans for digital designs, utilizing your expertise in SystemVerilog and UVM. Collaborating with teams, you'll create testbenches, run simulations, and document all verification strategies to ensure designs meet specifications. This position offers an exciting opportunity to contribute to innovative methodologies and verification techniques in a dynamic environment. If you are passionate about digital design and verification, this role is perfect for you! #J-18808-Ljbffr