Acceler8 Talent
Senior Firmware Engineer - San Francisco, CA
A company building AI systems that can interact with the physical world at scale – designing experiments, controlling hardware, and accelerating scientific discovery from days to reality – is looking for a Senior Firmware Engineer to join their team.
Base pay range $200,000.00/yr – $300,000.00/yr
What Will I Be Doing
Design auto‑generation flows transforming specs into deterministic firmware/RTL, including register maps, FSMs, and memory‑mapped interfaces
Own digital design correctness: clock/reset domains, CDC, timing constraints, and synthesis‑aware RTL for FPGA/ASIC workflows
Build integration layers for standard protocols (UART, SPI, I2C, CAN, Ethernet) and internal buses (AXI, APB, Wishbone)
Develop verification infrastructure: self‑checking testbenches, SVA, linting, coverage‑driven regression, and formal methods
Create tool‑driven feedback loops running synthesis/simulation/formal verification with automatic fix proposals
Ship CI/CD systems with golden tests, build determinism, and strict change controls
Implement safety guardrails: invariants, privilege boundaries, audit logging, and policies preventing unsafe outputs
Collaborate with platform, ML/agent, and domain teams to integrate into live hardware workflows
What We’re Looking For
Hardware protocol integration and memory‑mapped control patterns
Verification skills: testbenches, SVA/assertions, UVM concepts, simulation tools (Verilator, commercial)
FPGA/ASIC flow knowledge and ability to deliver synthesizable, timing‑clean RTL
AI‑powered code generation pipeline experience: spec → structured IR, templating, tool‑calling loops, safety mechanisms
Strong software engineering: clean architecture, testing, versioning, reliability mindset
What’s In It For Me
Salary of $200,000 – $300,000, dependent on experience
Greenfield work: build something that doesn’t exist at the frontier of physical AI and automated hardware design
Real impact: control actual physical systems contributing to breakthroughs in cancer detection, materials science, and more
Join a company backed by significant venture funding and a $42M government research programme
Apply now for immediate consideration!
Seniority level
Mid‑Senior level
Employment type
Full‑time
Job function
Information Technology
Industries
IT Services and IT Consulting
#J-18808-Ljbffr
Base pay range $200,000.00/yr – $300,000.00/yr
What Will I Be Doing
Design auto‑generation flows transforming specs into deterministic firmware/RTL, including register maps, FSMs, and memory‑mapped interfaces
Own digital design correctness: clock/reset domains, CDC, timing constraints, and synthesis‑aware RTL for FPGA/ASIC workflows
Build integration layers for standard protocols (UART, SPI, I2C, CAN, Ethernet) and internal buses (AXI, APB, Wishbone)
Develop verification infrastructure: self‑checking testbenches, SVA, linting, coverage‑driven regression, and formal methods
Create tool‑driven feedback loops running synthesis/simulation/formal verification with automatic fix proposals
Ship CI/CD systems with golden tests, build determinism, and strict change controls
Implement safety guardrails: invariants, privilege boundaries, audit logging, and policies preventing unsafe outputs
Collaborate with platform, ML/agent, and domain teams to integrate into live hardware workflows
What We’re Looking For
Hardware protocol integration and memory‑mapped control patterns
Verification skills: testbenches, SVA/assertions, UVM concepts, simulation tools (Verilator, commercial)
FPGA/ASIC flow knowledge and ability to deliver synthesizable, timing‑clean RTL
AI‑powered code generation pipeline experience: spec → structured IR, templating, tool‑calling loops, safety mechanisms
Strong software engineering: clean architecture, testing, versioning, reliability mindset
What’s In It For Me
Salary of $200,000 – $300,000, dependent on experience
Greenfield work: build something that doesn’t exist at the frontier of physical AI and automated hardware design
Real impact: control actual physical systems contributing to breakthroughs in cancer detection, materials science, and more
Join a company backed by significant venture funding and a $42M government research programme
Apply now for immediate consideration!
Seniority level
Mid‑Senior level
Employment type
Full‑time
Job function
Information Technology
Industries
IT Services and IT Consulting
#J-18808-Ljbffr